xref: /openbmc/linux/arch/mips/lib/dump_tlb.c (revision f35e839a)
1 /*
2  * Dump R4x00 TLB for debugging purposes.
3  *
4  * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle.
5  * Copyright (C) 1999 by Silicon Graphics, Inc.
6  */
7 #include <linux/kernel.h>
8 #include <linux/mm.h>
9 
10 #include <asm/mipsregs.h>
11 #include <asm/page.h>
12 #include <asm/pgtable.h>
13 #include <asm/tlbdebug.h>
14 #include <asm/mmu_context.h>
15 
16 static inline const char *msk2str(unsigned int mask)
17 {
18 	switch (mask) {
19 	case PM_4K:	return "4kb";
20 	case PM_16K:	return "16kb";
21 	case PM_64K:	return "64kb";
22 	case PM_256K:	return "256kb";
23 #ifdef CONFIG_CPU_CAVIUM_OCTEON
24 	case PM_8K:	return "8kb";
25 	case PM_32K:	return "32kb";
26 	case PM_128K:	return "128kb";
27 	case PM_512K:	return "512kb";
28 	case PM_2M:	return "2Mb";
29 	case PM_8M:	return "8Mb";
30 	case PM_32M:	return "32Mb";
31 #endif
32 #ifndef CONFIG_CPU_VR41XX
33 	case PM_1M:	return "1Mb";
34 	case PM_4M:	return "4Mb";
35 	case PM_16M:	return "16Mb";
36 	case PM_64M:	return "64Mb";
37 	case PM_256M:	return "256Mb";
38 	case PM_1G:	return "1Gb";
39 #endif
40 	}
41 	return "";
42 }
43 
44 #define BARRIER()					\
45 	__asm__ __volatile__(				\
46 		".set\tnoreorder\n\t"			\
47 		"nop;nop;nop;nop;nop;nop;nop\n\t"	\
48 		".set\treorder");
49 
50 static void dump_tlb(int first, int last)
51 {
52 	unsigned long s_entryhi, entryhi, asid;
53 	unsigned long long entrylo0, entrylo1;
54 	unsigned int s_index, s_pagemask, pagemask, c0, c1, i;
55 
56 	s_pagemask = read_c0_pagemask();
57 	s_entryhi = read_c0_entryhi();
58 	s_index = read_c0_index();
59 	asid = ASID_MASK(s_entryhi);
60 
61 	for (i = first; i <= last; i++) {
62 		write_c0_index(i);
63 		BARRIER();
64 		tlb_read();
65 		BARRIER();
66 		pagemask = read_c0_pagemask();
67 		entryhi	 = read_c0_entryhi();
68 		entrylo0 = read_c0_entrylo0();
69 		entrylo1 = read_c0_entrylo1();
70 
71 		/* Unused entries have a virtual address of CKSEG0.  */
72 		if ((entryhi & ~0x1ffffUL) != CKSEG0
73 		    && (entryhi & 0xff) == asid) {
74 #ifdef CONFIG_32BIT
75 			int width = 8;
76 #else
77 			int width = 11;
78 #endif
79 			/*
80 			 * Only print entries in use
81 			 */
82 			printk("Index: %2d pgmask=%s ", i, msk2str(pagemask));
83 
84 			c0 = (entrylo0 >> 3) & 7;
85 			c1 = (entrylo1 >> 3) & 7;
86 
87 			printk("va=%0*lx asid=%02lx\n",
88 			       width, (entryhi & ~0x1fffUL),
89 			       ASID_MASK(entryhi));
90 			printk("\t[pa=%0*llx c=%d d=%d v=%d g=%d] ",
91 			       width,
92 			       (entrylo0 << 6) & PAGE_MASK, c0,
93 			       (entrylo0 & 4) ? 1 : 0,
94 			       (entrylo0 & 2) ? 1 : 0,
95 			       (entrylo0 & 1) ? 1 : 0);
96 			printk("[pa=%0*llx c=%d d=%d v=%d g=%d]\n",
97 			       width,
98 			       (entrylo1 << 6) & PAGE_MASK, c1,
99 			       (entrylo1 & 4) ? 1 : 0,
100 			       (entrylo1 & 2) ? 1 : 0,
101 			       (entrylo1 & 1) ? 1 : 0);
102 		}
103 	}
104 	printk("\n");
105 
106 	write_c0_entryhi(s_entryhi);
107 	write_c0_index(s_index);
108 	write_c0_pagemask(s_pagemask);
109 }
110 
111 void dump_tlb_all(void)
112 {
113 	dump_tlb(0, current_cpu_data.tlbsize - 1);
114 }
115