xref: /openbmc/linux/arch/mips/lantiq/xway/prom.c (revision 94cdda6b)
1 /*
2  *  This program is free software; you can redistribute it and/or modify it
3  *  under the terms of the GNU General Public License version 2 as published
4  *  by the Free Software Foundation.
5  *
6  *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
7  */
8 
9 #include <linux/export.h>
10 #include <linux/clk.h>
11 #include <asm/bootinfo.h>
12 #include <asm/time.h>
13 
14 #include <lantiq_soc.h>
15 
16 #include "../prom.h"
17 
18 #define SOC_DANUBE	"Danube"
19 #define SOC_TWINPASS	"Twinpass"
20 #define SOC_AMAZON_SE	"Amazon_SE"
21 #define SOC_AR9		"AR9"
22 #define SOC_GR9		"GR9"
23 #define SOC_VR9		"VR9"
24 
25 #define COMP_DANUBE	"lantiq,danube"
26 #define COMP_TWINPASS	"lantiq,twinpass"
27 #define COMP_AMAZON_SE	"lantiq,ase"
28 #define COMP_AR9	"lantiq,ar9"
29 #define COMP_GR9	"lantiq,gr9"
30 #define COMP_VR9	"lantiq,vr9"
31 
32 #define PART_SHIFT	12
33 #define PART_MASK	0x0FFFFFFF
34 #define REV_SHIFT	28
35 #define REV_MASK	0xF0000000
36 
37 void __init ltq_soc_detect(struct ltq_soc_info *i)
38 {
39 	i->partnum = (ltq_r32(LTQ_MPS_CHIPID) & PART_MASK) >> PART_SHIFT;
40 	i->rev = (ltq_r32(LTQ_MPS_CHIPID) & REV_MASK) >> REV_SHIFT;
41 	sprintf(i->rev_type, "1.%d", i->rev);
42 	switch (i->partnum) {
43 	case SOC_ID_DANUBE1:
44 	case SOC_ID_DANUBE2:
45 		i->name = SOC_DANUBE;
46 		i->type = SOC_TYPE_DANUBE;
47 		i->compatible = COMP_DANUBE;
48 		break;
49 
50 	case SOC_ID_TWINPASS:
51 		i->name = SOC_TWINPASS;
52 		i->type = SOC_TYPE_DANUBE;
53 		i->compatible = COMP_TWINPASS;
54 		break;
55 
56 	case SOC_ID_ARX188:
57 	case SOC_ID_ARX168_1:
58 	case SOC_ID_ARX168_2:
59 	case SOC_ID_ARX182:
60 		i->name = SOC_AR9;
61 		i->type = SOC_TYPE_AR9;
62 		i->compatible = COMP_AR9;
63 		break;
64 
65 	case SOC_ID_GRX188:
66 	case SOC_ID_GRX168:
67 		i->name = SOC_GR9;
68 		i->type = SOC_TYPE_AR9;
69 		i->compatible = COMP_GR9;
70 		break;
71 
72 	case SOC_ID_AMAZON_SE_1:
73 	case SOC_ID_AMAZON_SE_2:
74 #ifdef CONFIG_PCI
75 		panic("ase is only supported for non pci kernels");
76 #endif
77 		i->name = SOC_AMAZON_SE;
78 		i->type = SOC_TYPE_AMAZON_SE;
79 		i->compatible = COMP_AMAZON_SE;
80 		break;
81 
82 	case SOC_ID_VRX282:
83 	case SOC_ID_VRX268:
84 	case SOC_ID_VRX288:
85 		i->name = SOC_VR9;
86 		i->type = SOC_TYPE_VR9;
87 		i->compatible = COMP_VR9;
88 		break;
89 
90 	case SOC_ID_GRX268:
91 	case SOC_ID_GRX288:
92 		i->name = SOC_GR9;
93 		i->type = SOC_TYPE_VR9;
94 		i->compatible = COMP_GR9;
95 		break;
96 
97 	case SOC_ID_VRX268_2:
98 	case SOC_ID_VRX288_2:
99 		i->name = SOC_VR9;
100 		i->type = SOC_TYPE_VR9_2;
101 		i->compatible = COMP_VR9;
102 		break;
103 
104 	case SOC_ID_GRX282_2:
105 	case SOC_ID_GRX288_2:
106 		i->name = SOC_GR9;
107 		i->type = SOC_TYPE_VR9_2;
108 		i->compatible = COMP_GR9;
109 		break;
110 
111 	default:
112 		unreachable();
113 		break;
114 	}
115 }
116