xref: /openbmc/linux/arch/mips/lantiq/falcon/reset.c (revision d3964221)
1 /*
2  * This program is free software; you can redistribute it and/or modify it
3  * under the terms of the GNU General Public License version 2 as published
4  * by the Free Software Foundation.
5  *
6  * Copyright (C) 2012 Thomas Langer <thomas.langer@lantiq.com>
7  * Copyright (C) 2012 John Crispin <john@phrozen.org>
8  */
9 
10 #include <linux/init.h>
11 #include <linux/io.h>
12 #include <linux/pm.h>
13 #include <asm/reboot.h>
14 #include <linux/export.h>
15 
16 #include <lantiq_soc.h>
17 
18 /*
19  * Dummy implementation.  Used to allow platform code to find out what
20  * source was booted from
21  */
22 unsigned char ltq_boot_select(void)
23 {
24 	return BS_SPI;
25 }
26 
27 #define BOOT_REG_BASE	(KSEG1 | 0x1F200000)
28 #define BOOT_PW1_REG	(BOOT_REG_BASE | 0x20)
29 #define BOOT_PW2_REG	(BOOT_REG_BASE | 0x24)
30 #define BOOT_PW1	0x4C545100
31 #define BOOT_PW2	0x0051544C
32 
33 #define WDT_REG_BASE	(KSEG1 | 0x1F8803F0)
34 #define WDT_PW1		0x00BE0000
35 #define WDT_PW2		0x00DC0000
36 
37 static void machine_restart(char *command)
38 {
39 	local_irq_disable();
40 
41 	/* reboot magic */
42 	ltq_w32(BOOT_PW1, (void *)BOOT_PW1_REG); /* 'LTQ\0' */
43 	ltq_w32(BOOT_PW2, (void *)BOOT_PW2_REG); /* '\0QTL' */
44 	ltq_w32(0, (void *)BOOT_REG_BASE); /* reset Bootreg RVEC */
45 
46 	/* watchdog magic */
47 	ltq_w32(WDT_PW1, (void *)WDT_REG_BASE);
48 	ltq_w32(WDT_PW2 |
49 		(0x3 << 26) | /* PWL */
50 		(0x2 << 24) | /* CLKDIV */
51 		(0x1 << 31) | /* enable */
52 		(1), /* reload */
53 		(void *)WDT_REG_BASE);
54 	unreachable();
55 }
56 
57 static void machine_halt(void)
58 {
59 	local_irq_disable();
60 	unreachable();
61 }
62 
63 static void machine_power_off(void)
64 {
65 	local_irq_disable();
66 	unreachable();
67 }
68 
69 static int __init mips_reboot_setup(void)
70 {
71 	_machine_restart = machine_restart;
72 	_machine_halt = machine_halt;
73 	pm_power_off = machine_power_off;
74 	return 0;
75 }
76 
77 arch_initcall(mips_reboot_setup);
78