1d7d5b05fSDeng-Cheng Zhu /* 2d7d5b05fSDeng-Cheng Zhu * This file is subject to the terms and conditions of the GNU General Public 3d7d5b05fSDeng-Cheng Zhu * License. See the file "COPYING" in the main directory of this archive 4d7d5b05fSDeng-Cheng Zhu * for more details. 5d7d5b05fSDeng-Cheng Zhu * 6d7d5b05fSDeng-Cheng Zhu * KVM/MIPS: Interrupts 7d7d5b05fSDeng-Cheng Zhu * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved. 8d7d5b05fSDeng-Cheng Zhu * Authors: Sanjay Lal <sanjayl@kymasys.com> 9d7d5b05fSDeng-Cheng Zhu */ 10d7d5b05fSDeng-Cheng Zhu 11d7d5b05fSDeng-Cheng Zhu /* 12d7d5b05fSDeng-Cheng Zhu * MIPS Exception Priorities, exceptions (including interrupts) are queued up 13d7d5b05fSDeng-Cheng Zhu * for the guest in the order specified by their priorities 14d7d5b05fSDeng-Cheng Zhu */ 15d7d5b05fSDeng-Cheng Zhu 16d7d5b05fSDeng-Cheng Zhu #define MIPS_EXC_RESET 0 17d7d5b05fSDeng-Cheng Zhu #define MIPS_EXC_SRESET 1 18d7d5b05fSDeng-Cheng Zhu #define MIPS_EXC_DEBUG_ST 2 19d7d5b05fSDeng-Cheng Zhu #define MIPS_EXC_DEBUG 3 20d7d5b05fSDeng-Cheng Zhu #define MIPS_EXC_DDB 4 21d7d5b05fSDeng-Cheng Zhu #define MIPS_EXC_NMI 5 22d7d5b05fSDeng-Cheng Zhu #define MIPS_EXC_MCHK 6 23d7d5b05fSDeng-Cheng Zhu #define MIPS_EXC_INT_TIMER 7 243f51d8fcSHuacai Chen #define MIPS_EXC_INT_IO_1 8 253f51d8fcSHuacai Chen #define MIPS_EXC_INT_IO_2 9 263f51d8fcSHuacai Chen #define MIPS_EXC_EXECUTE 10 273f51d8fcSHuacai Chen #define MIPS_EXC_INT_IPI_1 11 283f51d8fcSHuacai Chen #define MIPS_EXC_INT_IPI_2 12 293f51d8fcSHuacai Chen #define MIPS_EXC_MAX 13 30d7d5b05fSDeng-Cheng Zhu /* XXXSL More to follow */ 31d7d5b05fSDeng-Cheng Zhu 32d7d5b05fSDeng-Cheng Zhu #define C_TI (_ULCAST_(1) << 30) 33d7d5b05fSDeng-Cheng Zhu 343f51d8fcSHuacai Chen extern u32 *kvm_priority_to_irq; 353f51d8fcSHuacai Chen u32 kvm_irq_to_priority(u32 irq); 363f51d8fcSHuacai Chen 37d7d5b05fSDeng-Cheng Zhu int kvm_mips_pending_timer(struct kvm_vcpu *vcpu); 38d7d5b05fSDeng-Cheng Zhu 39bdb7ed86SJames Hogan void kvm_mips_deliver_interrupts(struct kvm_vcpu *vcpu, u32 cause); 40