1/* SPDX-License-Identifier: GPL-2.0 */ 2#include <asm/asm-offsets.h> 3#include <asm/thread_info.h> 4 5#define PAGE_SIZE _PAGE_SIZE 6 7/* 8 * Put .bss..swapper_pg_dir as the first thing in .bss. This will 9 * ensure that it has .bss alignment (64K). 10 */ 11#define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir) 12 13/* Cavium Octeon should not have a separate PT_NOTE Program Header. */ 14#ifndef CONFIG_CAVIUM_OCTEON_SOC 15#define EMITS_PT_NOTE 16#endif 17 18#include <asm-generic/vmlinux.lds.h> 19 20#undef mips 21#define mips mips 22OUTPUT_ARCH(mips) 23ENTRY(kernel_entry) 24PHDRS { 25 text PT_LOAD FLAGS(7); /* RWX */ 26#ifndef CONFIG_CAVIUM_OCTEON_SOC 27 note PT_NOTE FLAGS(4); /* R__ */ 28#endif /* CAVIUM_OCTEON_SOC */ 29} 30 31#ifdef CONFIG_32BIT 32 #ifdef CONFIG_CPU_LITTLE_ENDIAN 33 jiffies = jiffies_64; 34 #else 35 jiffies = jiffies_64 + 4; 36 #endif 37#else 38 jiffies = jiffies_64; 39#endif 40 41SECTIONS 42{ 43#ifdef CONFIG_BOOT_ELF64 44 /* Read-only sections, merged into text segment: */ 45 /* . = 0xc000000000000000; */ 46 47 /* This is the value for an Origin kernel, taken from an IRIX kernel. */ 48 /* . = 0xc00000000001c000; */ 49 50 /* Set the vaddr for the text segment to a value 51 * >= 0xa800 0000 0001 9000 if no symmon is going to configured 52 * >= 0xa800 0000 0030 0000 otherwise 53 */ 54 55 /* . = 0xa800000000300000; */ 56 . = 0xffffffff80300000; 57#endif 58 . = LINKER_LOAD_ADDRESS; 59 /* read-only */ 60 _text = .; /* Text and read-only data */ 61 .text : { 62 TEXT_TEXT 63 SCHED_TEXT 64 CPUIDLE_TEXT 65 LOCK_TEXT 66 KPROBES_TEXT 67 IRQENTRY_TEXT 68 SOFTIRQENTRY_TEXT 69 *(.fixup) 70 *(.gnu.warning) 71 . = ALIGN(16); 72 *(.got) /* Global offset table */ 73 } :text = 0 74 _etext = .; /* End of text section */ 75 76 EXCEPTION_TABLE(16) 77 78 /* Exception table for data bus errors */ 79 __dbe_table : { 80 __start___dbe_table = .; 81 KEEP(*(__dbe_table)) 82 __stop___dbe_table = .; 83 } 84 85 _sdata = .; /* Start of data section */ 86 RO_DATA(4096) 87 88 /* writeable */ 89 .data : { /* Data */ 90 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */ 91 92 INIT_TASK_DATA(THREAD_SIZE) 93 NOSAVE_DATA 94 PAGE_ALIGNED_DATA(PAGE_SIZE) 95 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT) 96 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT) 97 DATA_DATA 98 CONSTRUCTORS 99 } 100 BUG_TABLE 101 _gp = . + 0x8000; 102 .lit8 : { 103 *(.lit8) 104 } 105 .lit4 : { 106 *(.lit4) 107 } 108 /* We want the small data sections together, so single-instruction offsets 109 can access them all, and initialized data all before uninitialized, so 110 we can shorten the on-disk segment size. */ 111 .sdata : { 112 *(.sdata) 113 } 114 _edata = .; /* End of data section */ 115 116 /* will be freed after init */ 117 . = ALIGN(PAGE_SIZE); /* Init code and data */ 118 __init_begin = .; 119 INIT_TEXT_SECTION(PAGE_SIZE) 120 INIT_DATA_SECTION(16) 121 122 . = ALIGN(4); 123 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) { 124 __mips_machines_start = .; 125 KEEP(*(.mips.machines.init)) 126 __mips_machines_end = .; 127 } 128 129 /* .exit.text is discarded at runtime, not link time, to deal with 130 * references from .rodata 131 */ 132 .exit.text : { 133 EXIT_TEXT 134 } 135 .exit.data : { 136 EXIT_DATA 137 } 138#ifdef CONFIG_SMP 139 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT) 140#endif 141 142 .rel.dyn : ALIGN(8) { 143 *(.rel) 144 *(.rel*) 145 } 146 147#ifdef CONFIG_MIPS_ELF_APPENDED_DTB 148 STRUCT_ALIGN(); 149 .appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) { 150 *(.appended_dtb) 151 KEEP(*(.appended_dtb)) 152 } 153#endif 154 155#ifdef CONFIG_RELOCATABLE 156 . = ALIGN(4); 157 158 .data.reloc : { 159 _relocation_start = .; 160 /* 161 * Space for relocation table 162 * This needs to be filled so that the 163 * relocs tool can overwrite the content. 164 * An invalid value is left at the start of the 165 * section to abort relocation if the table 166 * has not been filled in. 167 */ 168 LONG(0xFFFFFFFF); 169 FILL(0); 170 . += CONFIG_RELOCATION_TABLE_SIZE - 4; 171 _relocation_end = .; 172 } 173#endif 174 175#ifdef CONFIG_MIPS_RAW_APPENDED_DTB 176 .fill : { 177 FILL(0); 178 BYTE(0); 179 STRUCT_ALIGN(); 180 } 181 __appended_dtb = .; 182 /* leave space for appended DTB */ 183 . += 0x100000; 184#endif 185 /* 186 * Align to 64K in attempt to eliminate holes before the 187 * .bss..swapper_pg_dir section at the start of .bss. This 188 * also satisfies PAGE_SIZE alignment as the largest page size 189 * allowed is 64K. 190 */ 191 . = ALIGN(0x10000); 192 __init_end = .; 193 /* freed after init ends here */ 194 195 /* 196 * Force .bss to 64K alignment so that .bss..swapper_pg_dir 197 * gets that alignment. .sbss should be empty, so there will be 198 * no holes after __init_end. */ 199 BSS_SECTION(0, 0x10000, 8) 200 201 _end = . ; 202 203 /* These mark the ABI of the kernel for debuggers. */ 204 .mdebug.abi32 : { 205 KEEP(*(.mdebug.abi32)) 206 } 207 .mdebug.abi64 : { 208 KEEP(*(.mdebug.abi64)) 209 } 210 211 /* This is the MIPS specific mdebug section. */ 212 .mdebug : { 213 *(.mdebug) 214 } 215 216 STABS_DEBUG 217 DWARF_DEBUG 218 ELF_DETAILS 219 220 /* These must appear regardless of . */ 221 .gptab.sdata : { 222 *(.gptab.data) 223 *(.gptab.sdata) 224 } 225 .gptab.sbss : { 226 *(.gptab.bss) 227 *(.gptab.sbss) 228 } 229 230 /* Sections to be discarded */ 231 DISCARDS 232 /DISCARD/ : { 233 /* ABI crap starts here */ 234 *(.MIPS.abiflags) 235 *(.MIPS.options) 236 *(.gnu.attributes) 237 *(.options) 238 *(.pdr) 239 *(.reginfo) 240 } 241} 242