xref: /openbmc/linux/arch/mips/kernel/vmlinux.lds.S (revision f3539c12)
1#include <asm/asm-offsets.h>
2#include <asm/thread_info.h>
3
4#define PAGE_SIZE _PAGE_SIZE
5
6/*
7 * Put .bss..swapper_pg_dir as the first thing in .bss. This will
8 * ensure that it has .bss alignment (64K).
9 */
10#define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
11
12#include <asm-generic/vmlinux.lds.h>
13
14#undef mips
15#define mips mips
16OUTPUT_ARCH(mips)
17ENTRY(kernel_entry)
18PHDRS {
19	text PT_LOAD FLAGS(7);	/* RWX */
20#ifndef CONFIG_CAVIUM_OCTEON_SOC
21	note PT_NOTE FLAGS(4);	/* R__ */
22#endif /* CAVIUM_OCTEON_SOC */
23}
24
25#ifdef CONFIG_32BIT
26	#ifdef CONFIG_CPU_LITTLE_ENDIAN
27		jiffies	 = jiffies_64;
28	#else
29		jiffies	 = jiffies_64 + 4;
30	#endif
31#else
32	jiffies	 = jiffies_64;
33#endif
34
35SECTIONS
36{
37#ifdef CONFIG_BOOT_ELF64
38	/* Read-only sections, merged into text segment: */
39	/* . = 0xc000000000000000; */
40
41	/* This is the value for an Origin kernel, taken from an IRIX kernel.  */
42	/* . = 0xc00000000001c000; */
43
44	/* Set the vaddr for the text segment to a value
45	 *   >= 0xa800 0000 0001 9000 if no symmon is going to configured
46	 *   >= 0xa800 0000 0030 0000 otherwise
47	 */
48
49	/* . = 0xa800000000300000; */
50	. = 0xffffffff80300000;
51#endif
52	. = VMLINUX_LOAD_ADDRESS;
53	/* read-only */
54	_text = .;	/* Text and read-only data */
55	.text : {
56		TEXT_TEXT
57		SCHED_TEXT
58		LOCK_TEXT
59		KPROBES_TEXT
60		IRQENTRY_TEXT
61		SOFTIRQENTRY_TEXT
62		*(.text.*)
63		*(.fixup)
64		*(.gnu.warning)
65	} :text = 0
66	_etext = .;	/* End of text section */
67
68	EXCEPTION_TABLE(16)
69
70	/* Exception table for data bus errors */
71	__dbe_table : {
72		__start___dbe_table = .;
73		*(__dbe_table)
74		__stop___dbe_table = .;
75	}
76
77#ifdef CONFIG_CAVIUM_OCTEON_SOC
78#define NOTES_HEADER
79#else /* CONFIG_CAVIUM_OCTEON_SOC */
80#define NOTES_HEADER :note
81#endif /* CONFIG_CAVIUM_OCTEON_SOC */
82	NOTES :text NOTES_HEADER
83	.dummy : { *(.dummy) } :text
84
85	_sdata = .;			/* Start of data section */
86	RODATA
87
88	/* writeable */
89	.data : {	/* Data */
90		. = . + DATAOFFSET;		/* for CONFIG_MAPPED_KERNEL */
91
92		INIT_TASK_DATA(THREAD_SIZE)
93		NOSAVE_DATA
94		CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
95		READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
96		DATA_DATA
97		CONSTRUCTORS
98	}
99	_gp = . + 0x8000;
100	.lit8 : {
101		*(.lit8)
102	}
103	.lit4 : {
104		*(.lit4)
105	}
106	/* We want the small data sections together, so single-instruction offsets
107	   can access them all, and initialized data all before uninitialized, so
108	   we can shorten the on-disk segment size.  */
109	.sdata : {
110		*(.sdata)
111	}
112	_edata =  .;			/* End of data section */
113
114	/* will be freed after init */
115	. = ALIGN(PAGE_SIZE);		/* Init code and data */
116	__init_begin = .;
117	INIT_TEXT_SECTION(PAGE_SIZE)
118	INIT_DATA_SECTION(16)
119
120	. = ALIGN(4);
121	.mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
122		__mips_machines_start = .;
123		*(.mips.machines.init)
124		__mips_machines_end = .;
125	}
126
127	/* .exit.text is discarded at runtime, not link time, to deal with
128	 * references from .rodata
129	 */
130	.exit.text : {
131		EXIT_TEXT
132	}
133	.exit.data : {
134		EXIT_DATA
135	}
136#ifdef CONFIG_SMP
137	PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
138#endif
139
140#ifdef CONFIG_RELOCATABLE
141	. = ALIGN(4);
142
143	.data.reloc : {
144		_relocation_start = .;
145		/*
146		 * Space for relocation table
147		 * This needs to be filled so that the
148		 * relocs tool can overwrite the content.
149		 * An invalid value is left at the start of the
150		 * section to abort relocation if the table
151		 * has not been filled in.
152		 */
153		LONG(0xFFFFFFFF);
154		FILL(0);
155		. += CONFIG_RELOCATION_TABLE_SIZE - 4;
156		_relocation_end = .;
157	}
158#endif
159
160#ifdef CONFIG_MIPS_RAW_APPENDED_DTB
161	__appended_dtb = .;
162	/* leave space for appended DTB */
163	. += 0x100000;
164#elif defined(CONFIG_MIPS_ELF_APPENDED_DTB)
165	.appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) {
166		*(.appended_dtb)
167		KEEP(*(.appended_dtb))
168	}
169#endif
170	/*
171	 * Align to 64K in attempt to eliminate holes before the
172	 * .bss..swapper_pg_dir section at the start of .bss.  This
173	 * also satisfies PAGE_SIZE alignment as the largest page size
174	 * allowed is 64K.
175	 */
176	. = ALIGN(0x10000);
177	__init_end = .;
178	/* freed after init ends here */
179
180	/*
181	 * Force .bss to 64K alignment so that .bss..swapper_pg_dir
182	 * gets that alignment.	 .sbss should be empty, so there will be
183	 * no holes after __init_end. */
184	BSS_SECTION(0, 0x10000, 0)
185
186	_end = . ;
187
188	/* These mark the ABI of the kernel for debuggers.  */
189	.mdebug.abi32 : {
190		KEEP(*(.mdebug.abi32))
191	}
192	.mdebug.abi64 : {
193		KEEP(*(.mdebug.abi64))
194	}
195
196	/* This is the MIPS specific mdebug section.  */
197	.mdebug : {
198		*(.mdebug)
199	}
200
201	STABS_DEBUG
202	DWARF_DEBUG
203
204	/* These must appear regardless of  .  */
205	.gptab.sdata : {
206		*(.gptab.data)
207		*(.gptab.sdata)
208	}
209	.gptab.sbss : {
210		*(.gptab.bss)
211		*(.gptab.sbss)
212	}
213
214	/* Sections to be discarded */
215	DISCARDS
216	/DISCARD/ : {
217		/* ABI crap starts here */
218		*(.MIPS.abiflags)
219		*(.MIPS.options)
220		*(.options)
221		*(.pdr)
222		*(.reginfo)
223		*(.eh_frame)
224	}
225}
226