1/* SPDX-License-Identifier: GPL-2.0 */ 2#include <asm/asm-offsets.h> 3#include <asm/thread_info.h> 4 5#define PAGE_SIZE _PAGE_SIZE 6 7/* 8 * Put .bss..swapper_pg_dir as the first thing in .bss. This will 9 * ensure that it has .bss alignment (64K). 10 */ 11#define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir) 12 13/* Cavium Octeon should not have a separate PT_NOTE Program Header. */ 14#ifndef CONFIG_CAVIUM_OCTEON_SOC 15#define EMITS_PT_NOTE 16#endif 17 18#include <asm-generic/vmlinux.lds.h> 19 20#undef mips 21#define mips mips 22OUTPUT_ARCH(mips) 23ENTRY(kernel_entry) 24PHDRS { 25 text PT_LOAD FLAGS(7); /* RWX */ 26#ifndef CONFIG_CAVIUM_OCTEON_SOC 27 note PT_NOTE FLAGS(4); /* R__ */ 28#endif /* CAVIUM_OCTEON_SOC */ 29} 30 31#ifdef CONFIG_32BIT 32 #ifdef CONFIG_CPU_LITTLE_ENDIAN 33 jiffies = jiffies_64; 34 #else 35 jiffies = jiffies_64 + 4; 36 #endif 37#else 38 jiffies = jiffies_64; 39#endif 40 41SECTIONS 42{ 43#ifdef CONFIG_BOOT_ELF64 44 /* Read-only sections, merged into text segment: */ 45 /* . = 0xc000000000000000; */ 46 47 /* This is the value for an Origin kernel, taken from an IRIX kernel. */ 48 /* . = 0xc00000000001c000; */ 49 50 /* Set the vaddr for the text segment to a value 51 * >= 0xa800 0000 0001 9000 if no symmon is going to configured 52 * >= 0xa800 0000 0030 0000 otherwise 53 */ 54 55 /* . = 0xa800000000300000; */ 56 . = 0xffffffff80300000; 57#endif 58 . = VMLINUX_LOAD_ADDRESS; 59 /* read-only */ 60 _text = .; /* Text and read-only data */ 61 .text : { 62 TEXT_TEXT 63 SCHED_TEXT 64 CPUIDLE_TEXT 65 LOCK_TEXT 66 KPROBES_TEXT 67 IRQENTRY_TEXT 68 SOFTIRQENTRY_TEXT 69 *(.text.*) 70 *(.fixup) 71 *(.gnu.warning) 72 } :text = 0 73 _etext = .; /* End of text section */ 74 75 EXCEPTION_TABLE(16) 76 77 /* Exception table for data bus errors */ 78 __dbe_table : { 79 __start___dbe_table = .; 80 KEEP(*(__dbe_table)) 81 __stop___dbe_table = .; 82 } 83 84 _sdata = .; /* Start of data section */ 85 RO_DATA(4096) 86 87 /* writeable */ 88 .data : { /* Data */ 89 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */ 90 91 INIT_TASK_DATA(THREAD_SIZE) 92 NOSAVE_DATA 93 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT) 94 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT) 95 DATA_DATA 96 CONSTRUCTORS 97 } 98 BUG_TABLE 99 _gp = . + 0x8000; 100 .lit8 : { 101 *(.lit8) 102 } 103 .lit4 : { 104 *(.lit4) 105 } 106 /* We want the small data sections together, so single-instruction offsets 107 can access them all, and initialized data all before uninitialized, so 108 we can shorten the on-disk segment size. */ 109 .sdata : { 110 *(.sdata) 111 } 112 _edata = .; /* End of data section */ 113 114 /* will be freed after init */ 115 . = ALIGN(PAGE_SIZE); /* Init code and data */ 116 __init_begin = .; 117 INIT_TEXT_SECTION(PAGE_SIZE) 118 INIT_DATA_SECTION(16) 119 120 . = ALIGN(4); 121 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) { 122 __mips_machines_start = .; 123 KEEP(*(.mips.machines.init)) 124 __mips_machines_end = .; 125 } 126 127 /* .exit.text is discarded at runtime, not link time, to deal with 128 * references from .rodata 129 */ 130 .exit.text : { 131 EXIT_TEXT 132 } 133 .exit.data : { 134 EXIT_DATA 135 } 136#ifdef CONFIG_SMP 137 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT) 138#endif 139 140#ifdef CONFIG_MIPS_ELF_APPENDED_DTB 141 .appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) { 142 *(.appended_dtb) 143 KEEP(*(.appended_dtb)) 144 } 145#endif 146 147#ifdef CONFIG_RELOCATABLE 148 . = ALIGN(4); 149 150 .data.reloc : { 151 _relocation_start = .; 152 /* 153 * Space for relocation table 154 * This needs to be filled so that the 155 * relocs tool can overwrite the content. 156 * An invalid value is left at the start of the 157 * section to abort relocation if the table 158 * has not been filled in. 159 */ 160 LONG(0xFFFFFFFF); 161 FILL(0); 162 . += CONFIG_RELOCATION_TABLE_SIZE - 4; 163 _relocation_end = .; 164 } 165#endif 166 167#ifdef CONFIG_MIPS_RAW_APPENDED_DTB 168 __appended_dtb = .; 169 /* leave space for appended DTB */ 170 . += 0x100000; 171#endif 172 /* 173 * Align to 64K in attempt to eliminate holes before the 174 * .bss..swapper_pg_dir section at the start of .bss. This 175 * also satisfies PAGE_SIZE alignment as the largest page size 176 * allowed is 64K. 177 */ 178 . = ALIGN(0x10000); 179 __init_end = .; 180 /* freed after init ends here */ 181 182 /* 183 * Force .bss to 64K alignment so that .bss..swapper_pg_dir 184 * gets that alignment. .sbss should be empty, so there will be 185 * no holes after __init_end. */ 186 BSS_SECTION(0, 0x10000, 8) 187 188 _end = . ; 189 190 /* These mark the ABI of the kernel for debuggers. */ 191 .mdebug.abi32 : { 192 KEEP(*(.mdebug.abi32)) 193 } 194 .mdebug.abi64 : { 195 KEEP(*(.mdebug.abi64)) 196 } 197 198 /* This is the MIPS specific mdebug section. */ 199 .mdebug : { 200 *(.mdebug) 201 } 202 203 STABS_DEBUG 204 DWARF_DEBUG 205 206 /* These must appear regardless of . */ 207 .gptab.sdata : { 208 *(.gptab.data) 209 *(.gptab.sdata) 210 } 211 .gptab.sbss : { 212 *(.gptab.bss) 213 *(.gptab.sbss) 214 } 215 216 /* Sections to be discarded */ 217 DISCARDS 218 /DISCARD/ : { 219 /* ABI crap starts here */ 220 *(.MIPS.abiflags) 221 *(.MIPS.options) 222 *(.options) 223 *(.pdr) 224 *(.reginfo) 225 *(.eh_frame) 226 } 227} 228