xref: /openbmc/linux/arch/mips/kernel/vmlinux.lds.S (revision 4da722ca)
1#include <asm/asm-offsets.h>
2#include <asm/thread_info.h>
3
4#define PAGE_SIZE _PAGE_SIZE
5
6/*
7 * Put .bss..swapper_pg_dir as the first thing in .bss. This will
8 * ensure that it has .bss alignment (64K).
9 */
10#define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
11
12#include <asm-generic/vmlinux.lds.h>
13
14#undef mips
15#define mips mips
16OUTPUT_ARCH(mips)
17ENTRY(kernel_entry)
18PHDRS {
19	text PT_LOAD FLAGS(7);	/* RWX */
20#ifndef CONFIG_CAVIUM_OCTEON_SOC
21	note PT_NOTE FLAGS(4);	/* R__ */
22#endif /* CAVIUM_OCTEON_SOC */
23}
24
25#ifdef CONFIG_32BIT
26	#ifdef CONFIG_CPU_LITTLE_ENDIAN
27		jiffies	 = jiffies_64;
28	#else
29		jiffies	 = jiffies_64 + 4;
30	#endif
31#else
32	jiffies	 = jiffies_64;
33#endif
34
35SECTIONS
36{
37#ifdef CONFIG_BOOT_ELF64
38	/* Read-only sections, merged into text segment: */
39	/* . = 0xc000000000000000; */
40
41	/* This is the value for an Origin kernel, taken from an IRIX kernel.  */
42	/* . = 0xc00000000001c000; */
43
44	/* Set the vaddr for the text segment to a value
45	 *   >= 0xa800 0000 0001 9000 if no symmon is going to configured
46	 *   >= 0xa800 0000 0030 0000 otherwise
47	 */
48
49	/* . = 0xa800000000300000; */
50	. = 0xffffffff80300000;
51#endif
52	. = VMLINUX_LOAD_ADDRESS;
53	/* read-only */
54	_text = .;	/* Text and read-only data */
55	.text : {
56		TEXT_TEXT
57		SCHED_TEXT
58		CPUIDLE_TEXT
59		LOCK_TEXT
60		KPROBES_TEXT
61		IRQENTRY_TEXT
62		SOFTIRQENTRY_TEXT
63		*(.text.*)
64		*(.fixup)
65		*(.gnu.warning)
66	} :text = 0
67	_etext = .;	/* End of text section */
68
69	EXCEPTION_TABLE(16)
70
71	/* Exception table for data bus errors */
72	__dbe_table : {
73		__start___dbe_table = .;
74		*(__dbe_table)
75		__stop___dbe_table = .;
76	}
77
78#ifdef CONFIG_CAVIUM_OCTEON_SOC
79#define NOTES_HEADER
80#else /* CONFIG_CAVIUM_OCTEON_SOC */
81#define NOTES_HEADER :note
82#endif /* CONFIG_CAVIUM_OCTEON_SOC */
83	NOTES :text NOTES_HEADER
84	.dummy : { *(.dummy) } :text
85
86	_sdata = .;			/* Start of data section */
87	RODATA
88
89	/* writeable */
90	.data : {	/* Data */
91		. = . + DATAOFFSET;		/* for CONFIG_MAPPED_KERNEL */
92
93		INIT_TASK_DATA(THREAD_SIZE)
94		NOSAVE_DATA
95		CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
96		READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
97		DATA_DATA
98		CONSTRUCTORS
99	}
100	BUG_TABLE
101	_gp = . + 0x8000;
102	.lit8 : {
103		*(.lit8)
104	}
105	.lit4 : {
106		*(.lit4)
107	}
108	/* We want the small data sections together, so single-instruction offsets
109	   can access them all, and initialized data all before uninitialized, so
110	   we can shorten the on-disk segment size.  */
111	.sdata : {
112		*(.sdata)
113	}
114	_edata =  .;			/* End of data section */
115
116	/* will be freed after init */
117	. = ALIGN(PAGE_SIZE);		/* Init code and data */
118	__init_begin = .;
119	INIT_TEXT_SECTION(PAGE_SIZE)
120	INIT_DATA_SECTION(16)
121
122	. = ALIGN(4);
123	.mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
124		__mips_machines_start = .;
125		*(.mips.machines.init)
126		__mips_machines_end = .;
127	}
128
129	/* .exit.text is discarded at runtime, not link time, to deal with
130	 * references from .rodata
131	 */
132	.exit.text : {
133		EXIT_TEXT
134	}
135	.exit.data : {
136		EXIT_DATA
137	}
138#ifdef CONFIG_SMP
139	PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
140#endif
141
142#ifdef CONFIG_RELOCATABLE
143	. = ALIGN(4);
144
145	.data.reloc : {
146		_relocation_start = .;
147		/*
148		 * Space for relocation table
149		 * This needs to be filled so that the
150		 * relocs tool can overwrite the content.
151		 * An invalid value is left at the start of the
152		 * section to abort relocation if the table
153		 * has not been filled in.
154		 */
155		LONG(0xFFFFFFFF);
156		FILL(0);
157		. += CONFIG_RELOCATION_TABLE_SIZE - 4;
158		_relocation_end = .;
159	}
160#endif
161
162#ifdef CONFIG_MIPS_RAW_APPENDED_DTB
163	__appended_dtb = .;
164	/* leave space for appended DTB */
165	. += 0x100000;
166#elif defined(CONFIG_MIPS_ELF_APPENDED_DTB)
167	.appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) {
168		*(.appended_dtb)
169		KEEP(*(.appended_dtb))
170	}
171#endif
172	/*
173	 * Align to 64K in attempt to eliminate holes before the
174	 * .bss..swapper_pg_dir section at the start of .bss.  This
175	 * also satisfies PAGE_SIZE alignment as the largest page size
176	 * allowed is 64K.
177	 */
178	. = ALIGN(0x10000);
179	__init_end = .;
180	/* freed after init ends here */
181
182	/*
183	 * Force .bss to 64K alignment so that .bss..swapper_pg_dir
184	 * gets that alignment.	 .sbss should be empty, so there will be
185	 * no holes after __init_end. */
186	BSS_SECTION(0, 0x10000, 8)
187
188	_end = . ;
189
190	/* These mark the ABI of the kernel for debuggers.  */
191	.mdebug.abi32 : {
192		KEEP(*(.mdebug.abi32))
193	}
194	.mdebug.abi64 : {
195		KEEP(*(.mdebug.abi64))
196	}
197
198	/* This is the MIPS specific mdebug section.  */
199	.mdebug : {
200		*(.mdebug)
201	}
202
203	STABS_DEBUG
204	DWARF_DEBUG
205
206	/* These must appear regardless of  .  */
207	.gptab.sdata : {
208		*(.gptab.data)
209		*(.gptab.sdata)
210	}
211	.gptab.sbss : {
212		*(.gptab.bss)
213		*(.gptab.sbss)
214	}
215
216	/* Sections to be discarded */
217	DISCARDS
218	/DISCARD/ : {
219		/* ABI crap starts here */
220		*(.MIPS.abiflags)
221		*(.MIPS.options)
222		*(.options)
223		*(.pdr)
224		*(.reginfo)
225		*(.eh_frame)
226	}
227}
228