1#include <asm/asm-offsets.h> 2#include <asm/page.h> 3#include <asm/thread_info.h> 4 5/* 6 * Put .bss..swapper_pg_dir as the first thing in .bss. This will 7 * ensure that it has .bss alignment (64K). 8 */ 9#define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir) 10 11#include <asm-generic/vmlinux.lds.h> 12 13#undef mips 14#define mips mips 15OUTPUT_ARCH(mips) 16ENTRY(kernel_entry) 17PHDRS { 18 text PT_LOAD FLAGS(7); /* RWX */ 19 note PT_NOTE FLAGS(4); /* R__ */ 20} 21 22#ifdef CONFIG_32BIT 23 #ifdef CONFIG_CPU_LITTLE_ENDIAN 24 jiffies = jiffies_64; 25 #else 26 jiffies = jiffies_64 + 4; 27 #endif 28#else 29 jiffies = jiffies_64; 30#endif 31 32SECTIONS 33{ 34#ifdef CONFIG_BOOT_ELF64 35 /* Read-only sections, merged into text segment: */ 36 /* . = 0xc000000000000000; */ 37 38 /* This is the value for an Origin kernel, taken from an IRIX kernel. */ 39 /* . = 0xc00000000001c000; */ 40 41 /* Set the vaddr for the text segment to a value 42 * >= 0xa800 0000 0001 9000 if no symmon is going to configured 43 * >= 0xa800 0000 0030 0000 otherwise 44 */ 45 46 /* . = 0xa800000000300000; */ 47 . = 0xffffffff80300000; 48#endif 49 . = VMLINUX_LOAD_ADDRESS; 50 /* read-only */ 51 _text = .; /* Text and read-only data */ 52 .text : { 53 TEXT_TEXT 54 SCHED_TEXT 55 LOCK_TEXT 56 KPROBES_TEXT 57 IRQENTRY_TEXT 58 *(.text.*) 59 *(.fixup) 60 *(.gnu.warning) 61 } :text = 0 62 _etext = .; /* End of text section */ 63 64 EXCEPTION_TABLE(16) 65 66 /* Exception table for data bus errors */ 67 __dbe_table : { 68 __start___dbe_table = .; 69 *(__dbe_table) 70 __stop___dbe_table = .; 71 } 72 73 NOTES :text :note 74 .dummy : { *(.dummy) } :text 75 76 _sdata = .; /* Start of data section */ 77 RODATA 78 79 /* writeable */ 80 .data : { /* Data */ 81 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */ 82 83 INIT_TASK_DATA(THREAD_SIZE) 84 NOSAVE_DATA 85 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT) 86 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT) 87 DATA_DATA 88 CONSTRUCTORS 89 } 90 _gp = . + 0x8000; 91 .lit8 : { 92 *(.lit8) 93 } 94 .lit4 : { 95 *(.lit4) 96 } 97 /* We want the small data sections together, so single-instruction offsets 98 can access them all, and initialized data all before uninitialized, so 99 we can shorten the on-disk segment size. */ 100 .sdata : { 101 *(.sdata) 102 } 103 _edata = .; /* End of data section */ 104 105 /* will be freed after init */ 106 . = ALIGN(PAGE_SIZE); /* Init code and data */ 107 __init_begin = .; 108 INIT_TEXT_SECTION(PAGE_SIZE) 109 INIT_DATA_SECTION(16) 110 111 . = ALIGN(4); 112 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) { 113 __mips_machines_start = .; 114 *(.mips.machines.init) 115 __mips_machines_end = .; 116 } 117 118 /* .exit.text is discarded at runtime, not link time, to deal with 119 * references from .rodata 120 */ 121 .exit.text : { 122 EXIT_TEXT 123 } 124 .exit.data : { 125 EXIT_DATA 126 } 127 128 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT) 129 /* 130 * Align to 64K in attempt to eliminate holes before the 131 * .bss..swapper_pg_dir section at the start of .bss. This 132 * also satisfies PAGE_SIZE alignment as the largest page size 133 * allowed is 64K. 134 */ 135 . = ALIGN(0x10000); 136 __init_end = .; 137 /* freed after init ends here */ 138 139 /* 140 * Force .bss to 64K alignment so that .bss..swapper_pg_dir 141 * gets that alignment. .sbss should be empty, so there will be 142 * no holes after __init_end. */ 143 BSS_SECTION(0, 0x10000, 0) 144 145 _end = . ; 146 147 /* These mark the ABI of the kernel for debuggers. */ 148 .mdebug.abi32 : { 149 KEEP(*(.mdebug.abi32)) 150 } 151 .mdebug.abi64 : { 152 KEEP(*(.mdebug.abi64)) 153 } 154 155 /* This is the MIPS specific mdebug section. */ 156 .mdebug : { 157 *(.mdebug) 158 } 159 160 STABS_DEBUG 161 DWARF_DEBUG 162 163 /* These must appear regardless of . */ 164 .gptab.sdata : { 165 *(.gptab.data) 166 *(.gptab.sdata) 167 } 168 .gptab.sbss : { 169 *(.gptab.bss) 170 *(.gptab.sbss) 171 } 172 173 /* Sections to be discarded */ 174 DISCARDS 175 /DISCARD/ : { 176 /* ABI crap starts here */ 177 *(.MIPS.options) 178 *(.options) 179 *(.pdr) 180 *(.reginfo) 181 } 182} 183