1 /* 2 * Copyright 2001 MontaVista Software Inc. 3 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net 4 * Copyright (c) 2003, 2004 Maciej W. Rozycki 5 * 6 * Common time service routines for MIPS machines. See 7 * Documentation/mips/time.README. 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License as published by the 11 * Free Software Foundation; either version 2 of the License, or (at your 12 * option) any later version. 13 */ 14 #include <linux/types.h> 15 #include <linux/kernel.h> 16 #include <linux/init.h> 17 #include <linux/sched.h> 18 #include <linux/param.h> 19 #include <linux/time.h> 20 #include <linux/timex.h> 21 #include <linux/smp.h> 22 #include <linux/kernel_stat.h> 23 #include <linux/spinlock.h> 24 #include <linux/interrupt.h> 25 #include <linux/module.h> 26 27 #include <asm/bootinfo.h> 28 #include <asm/cache.h> 29 #include <asm/compiler.h> 30 #include <asm/cpu.h> 31 #include <asm/cpu-features.h> 32 #include <asm/div64.h> 33 #include <asm/sections.h> 34 #include <asm/time.h> 35 36 /* 37 * The integer part of the number of usecs per jiffy is taken from tick, 38 * but the fractional part is not recorded, so we calculate it using the 39 * initial value of HZ. This aids systems where tick isn't really an 40 * integer (e.g. for HZ = 128). 41 */ 42 #define USECS_PER_JIFFY TICK_SIZE 43 #define USECS_PER_JIFFY_FRAC ((unsigned long)(u32)((1000000ULL << 32) / HZ)) 44 45 #define TICK_SIZE (tick_nsec / 1000) 46 47 /* 48 * forward reference 49 */ 50 DEFINE_SPINLOCK(rtc_lock); 51 52 /* 53 * By default we provide the null RTC ops 54 */ 55 static unsigned long null_rtc_get_time(void) 56 { 57 return mktime(2000, 1, 1, 0, 0, 0); 58 } 59 60 static int null_rtc_set_time(unsigned long sec) 61 { 62 return 0; 63 } 64 65 unsigned long (*rtc_mips_get_time)(void) = null_rtc_get_time; 66 int (*rtc_mips_set_time)(unsigned long) = null_rtc_set_time; 67 int (*rtc_mips_set_mmss)(unsigned long); 68 69 70 /* usecs per counter cycle, shifted to left by 32 bits */ 71 static unsigned int sll32_usecs_per_cycle; 72 73 /* how many counter cycles in a jiffy */ 74 static unsigned long cycles_per_jiffy __read_mostly; 75 76 /* Cycle counter value at the previous timer interrupt.. */ 77 static unsigned int timerhi, timerlo; 78 79 /* expirelo is the count value for next CPU timer interrupt */ 80 static unsigned int expirelo; 81 82 83 /* 84 * Null timer ack for systems not needing one (e.g. i8254). 85 */ 86 static void null_timer_ack(void) { /* nothing */ } 87 88 /* 89 * Null high precision timer functions for systems lacking one. 90 */ 91 static unsigned int null_hpt_read(void) 92 { 93 return 0; 94 } 95 96 static void null_hpt_init(unsigned int count) 97 { 98 /* nothing */ 99 } 100 101 102 /* 103 * Timer ack for an R4k-compatible timer of a known frequency. 104 */ 105 static void c0_timer_ack(void) 106 { 107 unsigned int count; 108 109 #ifndef CONFIG_SOC_PNX8550 /* pnx8550 resets to zero */ 110 /* Ack this timer interrupt and set the next one. */ 111 expirelo += cycles_per_jiffy; 112 #endif 113 write_c0_compare(expirelo); 114 115 /* Check to see if we have missed any timer interrupts. */ 116 while (((count = read_c0_count()) - expirelo) < 0x7fffffff) { 117 /* missed_timer_count++; */ 118 expirelo = count + cycles_per_jiffy; 119 write_c0_compare(expirelo); 120 } 121 } 122 123 /* 124 * High precision timer functions for a R4k-compatible timer. 125 */ 126 static unsigned int c0_hpt_read(void) 127 { 128 return read_c0_count(); 129 } 130 131 /* For use solely as a high precision timer. */ 132 static void c0_hpt_init(unsigned int count) 133 { 134 write_c0_count(read_c0_count() - count); 135 } 136 137 /* For use both as a high precision timer and an interrupt source. */ 138 static void c0_hpt_timer_init(unsigned int count) 139 { 140 count = read_c0_count() - count; 141 expirelo = (count / cycles_per_jiffy + 1) * cycles_per_jiffy; 142 write_c0_count(expirelo - cycles_per_jiffy); 143 write_c0_compare(expirelo); 144 write_c0_count(count); 145 } 146 147 int (*mips_timer_state)(void); 148 void (*mips_timer_ack)(void); 149 unsigned int (*mips_hpt_read)(void); 150 void (*mips_hpt_init)(unsigned int); 151 152 /* 153 * Gettimeoffset routines. These routines returns the time duration 154 * since last timer interrupt in usecs. 155 * 156 * If the exact CPU counter frequency is known, use fixed_rate_gettimeoffset. 157 * Otherwise use calibrate_gettimeoffset() 158 * 159 * If the CPU does not have the counter register, you can either supply 160 * your own gettimeoffset() routine, or use null_gettimeoffset(), which 161 * gives the same resolution as HZ. 162 */ 163 164 static unsigned long null_gettimeoffset(void) 165 { 166 return 0; 167 } 168 169 170 /* The function pointer to one of the gettimeoffset funcs. */ 171 unsigned long (*do_gettimeoffset)(void) = null_gettimeoffset; 172 173 174 static unsigned long fixed_rate_gettimeoffset(void) 175 { 176 u32 count; 177 unsigned long res; 178 179 /* Get last timer tick in absolute kernel time */ 180 count = mips_hpt_read(); 181 182 /* .. relative to previous jiffy (32 bits is enough) */ 183 count -= timerlo; 184 185 __asm__("multu %1,%2" 186 : "=h" (res) 187 : "r" (count), "r" (sll32_usecs_per_cycle) 188 : "lo", GCC_REG_ACCUM); 189 190 /* 191 * Due to possible jiffies inconsistencies, we need to check 192 * the result so that we'll get a timer that is monotonic. 193 */ 194 if (res >= USECS_PER_JIFFY) 195 res = USECS_PER_JIFFY - 1; 196 197 return res; 198 } 199 200 201 /* 202 * Cached "1/(clocks per usec) * 2^32" value. 203 * It has to be recalculated once each jiffy. 204 */ 205 static unsigned long cached_quotient; 206 207 /* Last jiffy when calibrate_divXX_gettimeoffset() was called. */ 208 static unsigned long last_jiffies; 209 210 /* 211 * This is moved from dec/time.c:do_ioasic_gettimeoffset() by Maciej. 212 */ 213 static unsigned long calibrate_div32_gettimeoffset(void) 214 { 215 u32 count; 216 unsigned long res, tmp; 217 unsigned long quotient; 218 219 tmp = jiffies; 220 221 quotient = cached_quotient; 222 223 if (last_jiffies != tmp) { 224 last_jiffies = tmp; 225 if (last_jiffies != 0) { 226 unsigned long r0; 227 do_div64_32(r0, timerhi, timerlo, tmp); 228 do_div64_32(quotient, USECS_PER_JIFFY, 229 USECS_PER_JIFFY_FRAC, r0); 230 cached_quotient = quotient; 231 } 232 } 233 234 /* Get last timer tick in absolute kernel time */ 235 count = mips_hpt_read(); 236 237 /* .. relative to previous jiffy (32 bits is enough) */ 238 count -= timerlo; 239 240 __asm__("multu %1,%2" 241 : "=h" (res) 242 : "r" (count), "r" (quotient) 243 : "lo", GCC_REG_ACCUM); 244 245 /* 246 * Due to possible jiffies inconsistencies, we need to check 247 * the result so that we'll get a timer that is monotonic. 248 */ 249 if (res >= USECS_PER_JIFFY) 250 res = USECS_PER_JIFFY - 1; 251 252 return res; 253 } 254 255 static unsigned long calibrate_div64_gettimeoffset(void) 256 { 257 u32 count; 258 unsigned long res, tmp; 259 unsigned long quotient; 260 261 tmp = jiffies; 262 263 quotient = cached_quotient; 264 265 if (last_jiffies != tmp) { 266 last_jiffies = tmp; 267 if (last_jiffies) { 268 unsigned long r0; 269 __asm__(".set push\n\t" 270 ".set mips3\n\t" 271 "lwu %0,%3\n\t" 272 "dsll32 %1,%2,0\n\t" 273 "or %1,%1,%0\n\t" 274 "ddivu $0,%1,%4\n\t" 275 "mflo %1\n\t" 276 "dsll32 %0,%5,0\n\t" 277 "or %0,%0,%6\n\t" 278 "ddivu $0,%0,%1\n\t" 279 "mflo %0\n\t" 280 ".set pop" 281 : "=&r" (quotient), "=&r" (r0) 282 : "r" (timerhi), "m" (timerlo), 283 "r" (tmp), "r" (USECS_PER_JIFFY), 284 "r" (USECS_PER_JIFFY_FRAC) 285 : "hi", "lo", GCC_REG_ACCUM); 286 cached_quotient = quotient; 287 } 288 } 289 290 /* Get last timer tick in absolute kernel time */ 291 count = mips_hpt_read(); 292 293 /* .. relative to previous jiffy (32 bits is enough) */ 294 count -= timerlo; 295 296 __asm__("multu %1,%2" 297 : "=h" (res) 298 : "r" (count), "r" (quotient) 299 : "lo", GCC_REG_ACCUM); 300 301 /* 302 * Due to possible jiffies inconsistencies, we need to check 303 * the result so that we'll get a timer that is monotonic. 304 */ 305 if (res >= USECS_PER_JIFFY) 306 res = USECS_PER_JIFFY - 1; 307 308 return res; 309 } 310 311 312 /* last time when xtime and rtc are sync'ed up */ 313 static long last_rtc_update; 314 315 /* 316 * local_timer_interrupt() does profiling and process accounting 317 * on a per-CPU basis. 318 * 319 * In UP mode, it is invoked from the (global) timer_interrupt. 320 * 321 * In SMP mode, it might invoked by per-CPU timer interrupt, or 322 * a broadcasted inter-processor interrupt which itself is triggered 323 * by the global timer interrupt. 324 */ 325 void local_timer_interrupt(int irq, void *dev_id) 326 { 327 if (current->pid) 328 profile_tick(CPU_PROFILING); 329 update_process_times(user_mode(get_irq_regs())); 330 } 331 332 /* 333 * High-level timer interrupt service routines. This function 334 * is set as irqaction->handler and is invoked through do_IRQ. 335 */ 336 irqreturn_t timer_interrupt(int irq, void *dev_id) 337 { 338 unsigned long j; 339 unsigned int count; 340 341 write_seqlock(&xtime_lock); 342 343 count = mips_hpt_read(); 344 mips_timer_ack(); 345 346 /* Update timerhi/timerlo for intra-jiffy calibration. */ 347 timerhi += count < timerlo; /* Wrap around */ 348 timerlo = count; 349 350 /* 351 * call the generic timer interrupt handling 352 */ 353 do_timer(1); 354 355 /* 356 * If we have an externally synchronized Linux clock, then update 357 * CMOS clock accordingly every ~11 minutes. rtc_mips_set_time() has to be 358 * called as close as possible to 500 ms before the new second starts. 359 */ 360 if (ntp_synced() && 361 xtime.tv_sec > last_rtc_update + 660 && 362 (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 && 363 (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) { 364 if (rtc_mips_set_mmss(xtime.tv_sec) == 0) { 365 last_rtc_update = xtime.tv_sec; 366 } else { 367 /* do it again in 60 s */ 368 last_rtc_update = xtime.tv_sec - 600; 369 } 370 } 371 372 /* 373 * If jiffies has overflown in this timer_interrupt, we must 374 * update the timer[hi]/[lo] to make fast gettimeoffset funcs 375 * quotient calc still valid. -arca 376 * 377 * The first timer interrupt comes late as interrupts are 378 * enabled long after timers are initialized. Therefore the 379 * high precision timer is fast, leading to wrong gettimeoffset() 380 * calculations. We deal with it by setting it based on the 381 * number of its ticks between the second and the third interrupt. 382 * That is still somewhat imprecise, but it's a good estimate. 383 * --macro 384 */ 385 j = jiffies; 386 if (j < 4) { 387 static unsigned int prev_count; 388 static int hpt_initialized; 389 390 switch (j) { 391 case 0: 392 timerhi = timerlo = 0; 393 mips_hpt_init(count); 394 break; 395 case 2: 396 prev_count = count; 397 break; 398 case 3: 399 if (!hpt_initialized) { 400 unsigned int c3 = 3 * (count - prev_count); 401 402 timerhi = 0; 403 timerlo = c3; 404 mips_hpt_init(count - c3); 405 hpt_initialized = 1; 406 } 407 break; 408 default: 409 break; 410 } 411 } 412 413 write_sequnlock(&xtime_lock); 414 415 /* 416 * In UP mode, we call local_timer_interrupt() to do profiling 417 * and process accouting. 418 * 419 * In SMP mode, local_timer_interrupt() is invoked by appropriate 420 * low-level local timer interrupt handler. 421 */ 422 local_timer_interrupt(irq, dev_id); 423 424 return IRQ_HANDLED; 425 } 426 427 int null_perf_irq(void) 428 { 429 return 0; 430 } 431 432 int (*perf_irq)(void) = null_perf_irq; 433 434 EXPORT_SYMBOL(null_perf_irq); 435 EXPORT_SYMBOL(perf_irq); 436 437 asmlinkage void ll_timer_interrupt(int irq, struct pt_regs *regs) 438 { 439 struct pt_regs *old_regs = set_irq_regs(regs); 440 int r2 = cpu_has_mips_r2; 441 442 irq_enter(); 443 kstat_this_cpu.irqs[irq]++; 444 445 /* 446 * Suckage alert: 447 * Before R2 of the architecture there was no way to see if a 448 * performance counter interrupt was pending, so we have to run the 449 * performance counter interrupt handler anyway. 450 */ 451 if (!r2 || (read_c0_cause() & (1 << 26))) 452 if (perf_irq()) 453 goto out; 454 455 /* we keep interrupt disabled all the time */ 456 if (!r2 || (read_c0_cause() & (1 << 30))) 457 timer_interrupt(irq, NULL); 458 459 out: 460 irq_exit(); 461 set_irq_regs(old_regs); 462 } 463 464 asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs) 465 { 466 struct pt_regs *old_regs = set_irq_regs(regs); 467 irq_enter(); 468 if (smp_processor_id() != 0) 469 kstat_this_cpu.irqs[irq]++; 470 471 /* we keep interrupt disabled all the time */ 472 local_timer_interrupt(irq, NULL); 473 474 irq_exit(); 475 set_irq_regs(old_regs); 476 } 477 478 /* 479 * time_init() - it does the following things. 480 * 481 * 1) board_time_init() - 482 * a) (optional) set up RTC routines, 483 * b) (optional) calibrate and set the mips_hpt_frequency 484 * (only needed if you intended to use fixed_rate_gettimeoffset 485 * or use cpu counter as timer interrupt source) 486 * 2) setup xtime based on rtc_mips_get_time(). 487 * 3) choose a appropriate gettimeoffset routine. 488 * 4) calculate a couple of cached variables for later usage 489 * 5) plat_timer_setup() - 490 * a) (optional) over-write any choices made above by time_init(). 491 * b) machine specific code should setup the timer irqaction. 492 * c) enable the timer interrupt 493 */ 494 495 void (*board_time_init)(void); 496 497 unsigned int mips_hpt_frequency; 498 499 static struct irqaction timer_irqaction = { 500 .handler = timer_interrupt, 501 .flags = IRQF_DISABLED, 502 .name = "timer", 503 }; 504 505 static unsigned int __init calibrate_hpt(void) 506 { 507 u64 frequency; 508 u32 hpt_start, hpt_end, hpt_count, hz; 509 510 const int loops = HZ / 10; 511 int log_2_loops = 0; 512 int i; 513 514 /* 515 * We want to calibrate for 0.1s, but to avoid a 64-bit 516 * division we round the number of loops up to the nearest 517 * power of 2. 518 */ 519 while (loops > 1 << log_2_loops) 520 log_2_loops++; 521 i = 1 << log_2_loops; 522 523 /* 524 * Wait for a rising edge of the timer interrupt. 525 */ 526 while (mips_timer_state()); 527 while (!mips_timer_state()); 528 529 /* 530 * Now see how many high precision timer ticks happen 531 * during the calculated number of periods between timer 532 * interrupts. 533 */ 534 hpt_start = mips_hpt_read(); 535 do { 536 while (mips_timer_state()); 537 while (!mips_timer_state()); 538 } while (--i); 539 hpt_end = mips_hpt_read(); 540 541 hpt_count = hpt_end - hpt_start; 542 hz = HZ; 543 frequency = (u64)hpt_count * (u64)hz; 544 545 return frequency >> log_2_loops; 546 } 547 548 void __init time_init(void) 549 { 550 if (board_time_init) 551 board_time_init(); 552 553 if (!rtc_mips_set_mmss) 554 rtc_mips_set_mmss = rtc_mips_set_time; 555 556 xtime.tv_sec = rtc_mips_get_time(); 557 xtime.tv_nsec = 0; 558 559 set_normalized_timespec(&wall_to_monotonic, 560 -xtime.tv_sec, -xtime.tv_nsec); 561 562 /* Choose appropriate high precision timer routines. */ 563 if (!cpu_has_counter && !mips_hpt_read) { 564 /* No high precision timer -- sorry. */ 565 mips_hpt_read = null_hpt_read; 566 mips_hpt_init = null_hpt_init; 567 } else if (!mips_hpt_frequency && !mips_timer_state) { 568 /* A high precision timer of unknown frequency. */ 569 if (!mips_hpt_read) { 570 /* No external high precision timer -- use R4k. */ 571 mips_hpt_read = c0_hpt_read; 572 mips_hpt_init = c0_hpt_init; 573 } 574 575 if (cpu_has_mips32r1 || cpu_has_mips32r2 || 576 (current_cpu_data.isa_level == MIPS_CPU_ISA_I) || 577 (current_cpu_data.isa_level == MIPS_CPU_ISA_II)) 578 /* 579 * We need to calibrate the counter but we don't have 580 * 64-bit division. 581 */ 582 do_gettimeoffset = calibrate_div32_gettimeoffset; 583 else 584 /* 585 * We need to calibrate the counter but we *do* have 586 * 64-bit division. 587 */ 588 do_gettimeoffset = calibrate_div64_gettimeoffset; 589 } else { 590 /* We know counter frequency. Or we can get it. */ 591 if (!mips_hpt_read) { 592 /* No external high precision timer -- use R4k. */ 593 mips_hpt_read = c0_hpt_read; 594 595 if (mips_timer_state) 596 mips_hpt_init = c0_hpt_init; 597 else { 598 /* No external timer interrupt -- use R4k. */ 599 mips_hpt_init = c0_hpt_timer_init; 600 mips_timer_ack = c0_timer_ack; 601 } 602 } 603 if (!mips_hpt_frequency) 604 mips_hpt_frequency = calibrate_hpt(); 605 606 do_gettimeoffset = fixed_rate_gettimeoffset; 607 608 /* Calculate cache parameters. */ 609 cycles_per_jiffy = (mips_hpt_frequency + HZ / 2) / HZ; 610 611 /* sll32_usecs_per_cycle = 10^6 * 2^32 / mips_counter_freq */ 612 do_div64_32(sll32_usecs_per_cycle, 613 1000000, mips_hpt_frequency / 2, 614 mips_hpt_frequency); 615 616 /* Report the high precision timer rate for a reference. */ 617 printk("Using %u.%03u MHz high precision timer.\n", 618 ((mips_hpt_frequency + 500) / 1000) / 1000, 619 ((mips_hpt_frequency + 500) / 1000) % 1000); 620 } 621 622 if (!mips_timer_ack) 623 /* No timer interrupt ack (e.g. i8254). */ 624 mips_timer_ack = null_timer_ack; 625 626 /* This sets up the high precision timer for the first interrupt. */ 627 mips_hpt_init(mips_hpt_read()); 628 629 /* 630 * Call board specific timer interrupt setup. 631 * 632 * this pointer must be setup in machine setup routine. 633 * 634 * Even if a machine chooses to use a low-level timer interrupt, 635 * it still needs to setup the timer_irqaction. 636 * In that case, it might be better to set timer_irqaction.handler 637 * to be NULL function so that we are sure the high-level code 638 * is not invoked accidentally. 639 */ 640 plat_timer_setup(&timer_irqaction); 641 } 642 643 #define FEBRUARY 2 644 #define STARTOFTIME 1970 645 #define SECDAY 86400L 646 #define SECYR (SECDAY * 365) 647 #define leapyear(y) ((!((y) % 4) && ((y) % 100)) || !((y) % 400)) 648 #define days_in_year(y) (leapyear(y) ? 366 : 365) 649 #define days_in_month(m) (month_days[(m) - 1]) 650 651 static int month_days[12] = { 652 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 653 }; 654 655 void to_tm(unsigned long tim, struct rtc_time *tm) 656 { 657 long hms, day, gday; 658 int i; 659 660 gday = day = tim / SECDAY; 661 hms = tim % SECDAY; 662 663 /* Hours, minutes, seconds are easy */ 664 tm->tm_hour = hms / 3600; 665 tm->tm_min = (hms % 3600) / 60; 666 tm->tm_sec = (hms % 3600) % 60; 667 668 /* Number of years in days */ 669 for (i = STARTOFTIME; day >= days_in_year(i); i++) 670 day -= days_in_year(i); 671 tm->tm_year = i; 672 673 /* Number of months in days left */ 674 if (leapyear(tm->tm_year)) 675 days_in_month(FEBRUARY) = 29; 676 for (i = 1; day >= days_in_month(i); i++) 677 day -= days_in_month(i); 678 days_in_month(FEBRUARY) = 28; 679 tm->tm_mon = i - 1; /* tm_mon starts from 0 to 11 */ 680 681 /* Days are what is left over (+1) from all that. */ 682 tm->tm_mday = day + 1; 683 684 /* 685 * Determine the day of week 686 */ 687 tm->tm_wday = (gday + 4) % 7; /* 1970/1/1 was Thursday */ 688 } 689 690 EXPORT_SYMBOL(rtc_lock); 691 EXPORT_SYMBOL(to_tm); 692 EXPORT_SYMBOL(rtc_mips_set_time); 693 EXPORT_SYMBOL(rtc_mips_get_time); 694 695 unsigned long long sched_clock(void) 696 { 697 return (unsigned long long)jiffies*(1000000000/HZ); 698 } 699