1 /* 2 * MIPS specific sysrq operations. 3 * 4 * Copyright (C) 2015 Imagination Technologies Ltd. 5 */ 6 #include <linux/init.h> 7 #include <linux/smp.h> 8 #include <linux/spinlock.h> 9 #include <linux/sysrq.h> 10 #include <linux/workqueue.h> 11 12 #include <asm/cpu-features.h> 13 #include <asm/mipsregs.h> 14 #include <asm/tlbdebug.h> 15 16 /* 17 * Dump TLB entries on all CPUs. 18 */ 19 20 static DEFINE_SPINLOCK(show_lock); 21 22 static void sysrq_tlbdump_single(void *dummy) 23 { 24 const int field = 2 * sizeof(unsigned long); 25 unsigned long flags; 26 27 spin_lock_irqsave(&show_lock, flags); 28 29 pr_info("CPU%d:\n", smp_processor_id()); 30 pr_info("Index : %0x\n", read_c0_index()); 31 pr_info("Pagemask: %0x\n", read_c0_pagemask()); 32 pr_info("EntryHi : %0*lx\n", field, read_c0_entryhi()); 33 pr_info("EntryLo0: %0*lx\n", field, read_c0_entrylo0()); 34 pr_info("EntryLo1: %0*lx\n", field, read_c0_entrylo1()); 35 pr_info("Wired : %0x\n", read_c0_wired()); 36 pr_info("Pagegrain: %0x\n", read_c0_pagegrain()); 37 if (cpu_has_htw) { 38 pr_info("PWField : %0*lx\n", field, read_c0_pwfield()); 39 pr_info("PWSize : %0*lx\n", field, read_c0_pwsize()); 40 pr_info("PWCtl : %0x\n", read_c0_pwctl()); 41 } 42 pr_info("\n"); 43 dump_tlb_all(); 44 pr_info("\n"); 45 46 spin_unlock_irqrestore(&show_lock, flags); 47 } 48 49 #ifdef CONFIG_SMP 50 static void sysrq_tlbdump_othercpus(struct work_struct *dummy) 51 { 52 smp_call_function(sysrq_tlbdump_single, NULL, 0); 53 } 54 55 static DECLARE_WORK(sysrq_tlbdump, sysrq_tlbdump_othercpus); 56 #endif 57 58 static void sysrq_handle_tlbdump(int key) 59 { 60 sysrq_tlbdump_single(NULL); 61 #ifdef CONFIG_SMP 62 schedule_work(&sysrq_tlbdump); 63 #endif 64 } 65 66 static struct sysrq_key_op sysrq_tlbdump_op = { 67 .handler = sysrq_handle_tlbdump, 68 .help_msg = "show-tlbs(x)", 69 .action_msg = "Show TLB entries", 70 .enable_mask = SYSRQ_ENABLE_DUMP, 71 }; 72 73 static int __init mips_sysrq_init(void) 74 { 75 return register_sysrq_key('x', &sysrq_tlbdump_op); 76 } 77 arch_initcall(mips_sysrq_init); 78