1/* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1996, 1998 by Ralf Baechle 7 * 8 * Multi-arch abstraction and asm macros for easier reading: 9 * Copyright (C) 1996 David S. Miller (davem@davemloft.net) 10 * 11 * Further modifications to make this work: 12 * Copyright (c) 1998 Harald Koerfgen 13 */ 14#include <asm/asm.h> 15#include <asm/errno.h> 16#include <asm/fpregdef.h> 17#include <asm/mipsregs.h> 18#include <asm/asm-offsets.h> 19#include <asm/regdef.h> 20 21#define EX(a,b) \ 229: a,##b; \ 23 .section __ex_table,"a"; \ 24 PTR 9b,bad_stack; \ 25 .previous 26 27 .set noreorder 28 .set mips1 29 /* Save floating point context */ 30LEAF(_save_fp_context) 31 .set push 32 SET_HARDFLOAT 33 li v0, 0 # assume success 34 cfc1 t1,fcr31 35 EX(swc1 $f0,(SC_FPREGS+0)(a0)) 36 EX(swc1 $f1,(SC_FPREGS+8)(a0)) 37 EX(swc1 $f2,(SC_FPREGS+16)(a0)) 38 EX(swc1 $f3,(SC_FPREGS+24)(a0)) 39 EX(swc1 $f4,(SC_FPREGS+32)(a0)) 40 EX(swc1 $f5,(SC_FPREGS+40)(a0)) 41 EX(swc1 $f6,(SC_FPREGS+48)(a0)) 42 EX(swc1 $f7,(SC_FPREGS+56)(a0)) 43 EX(swc1 $f8,(SC_FPREGS+64)(a0)) 44 EX(swc1 $f9,(SC_FPREGS+72)(a0)) 45 EX(swc1 $f10,(SC_FPREGS+80)(a0)) 46 EX(swc1 $f11,(SC_FPREGS+88)(a0)) 47 EX(swc1 $f12,(SC_FPREGS+96)(a0)) 48 EX(swc1 $f13,(SC_FPREGS+104)(a0)) 49 EX(swc1 $f14,(SC_FPREGS+112)(a0)) 50 EX(swc1 $f15,(SC_FPREGS+120)(a0)) 51 EX(swc1 $f16,(SC_FPREGS+128)(a0)) 52 EX(swc1 $f17,(SC_FPREGS+136)(a0)) 53 EX(swc1 $f18,(SC_FPREGS+144)(a0)) 54 EX(swc1 $f19,(SC_FPREGS+152)(a0)) 55 EX(swc1 $f20,(SC_FPREGS+160)(a0)) 56 EX(swc1 $f21,(SC_FPREGS+168)(a0)) 57 EX(swc1 $f22,(SC_FPREGS+176)(a0)) 58 EX(swc1 $f23,(SC_FPREGS+184)(a0)) 59 EX(swc1 $f24,(SC_FPREGS+192)(a0)) 60 EX(swc1 $f25,(SC_FPREGS+200)(a0)) 61 EX(swc1 $f26,(SC_FPREGS+208)(a0)) 62 EX(swc1 $f27,(SC_FPREGS+216)(a0)) 63 EX(swc1 $f28,(SC_FPREGS+224)(a0)) 64 EX(swc1 $f29,(SC_FPREGS+232)(a0)) 65 EX(swc1 $f30,(SC_FPREGS+240)(a0)) 66 EX(swc1 $f31,(SC_FPREGS+248)(a0)) 67 EX(sw t1,(SC_FPC_CSR)(a0)) 68 cfc1 t0,$0 # implementation/version 69 jr ra 70 .set pop 71 .set nomacro 72 EX(sw t0,(SC_FPC_EIR)(a0)) 73 .set macro 74 END(_save_fp_context) 75 76/* 77 * Restore FPU state: 78 * - fp gp registers 79 * - cp1 status/control register 80 * 81 * We base the decision which registers to restore from the signal stack 82 * frame on the current content of c0_status, not on the content of the 83 * stack frame which might have been changed by the user. 84 */ 85LEAF(_restore_fp_context) 86 .set push 87 SET_HARDFLOAT 88 li v0, 0 # assume success 89 EX(lw t0,(SC_FPC_CSR)(a0)) 90 EX(lwc1 $f0,(SC_FPREGS+0)(a0)) 91 EX(lwc1 $f1,(SC_FPREGS+8)(a0)) 92 EX(lwc1 $f2,(SC_FPREGS+16)(a0)) 93 EX(lwc1 $f3,(SC_FPREGS+24)(a0)) 94 EX(lwc1 $f4,(SC_FPREGS+32)(a0)) 95 EX(lwc1 $f5,(SC_FPREGS+40)(a0)) 96 EX(lwc1 $f6,(SC_FPREGS+48)(a0)) 97 EX(lwc1 $f7,(SC_FPREGS+56)(a0)) 98 EX(lwc1 $f8,(SC_FPREGS+64)(a0)) 99 EX(lwc1 $f9,(SC_FPREGS+72)(a0)) 100 EX(lwc1 $f10,(SC_FPREGS+80)(a0)) 101 EX(lwc1 $f11,(SC_FPREGS+88)(a0)) 102 EX(lwc1 $f12,(SC_FPREGS+96)(a0)) 103 EX(lwc1 $f13,(SC_FPREGS+104)(a0)) 104 EX(lwc1 $f14,(SC_FPREGS+112)(a0)) 105 EX(lwc1 $f15,(SC_FPREGS+120)(a0)) 106 EX(lwc1 $f16,(SC_FPREGS+128)(a0)) 107 EX(lwc1 $f17,(SC_FPREGS+136)(a0)) 108 EX(lwc1 $f18,(SC_FPREGS+144)(a0)) 109 EX(lwc1 $f19,(SC_FPREGS+152)(a0)) 110 EX(lwc1 $f20,(SC_FPREGS+160)(a0)) 111 EX(lwc1 $f21,(SC_FPREGS+168)(a0)) 112 EX(lwc1 $f22,(SC_FPREGS+176)(a0)) 113 EX(lwc1 $f23,(SC_FPREGS+184)(a0)) 114 EX(lwc1 $f24,(SC_FPREGS+192)(a0)) 115 EX(lwc1 $f25,(SC_FPREGS+200)(a0)) 116 EX(lwc1 $f26,(SC_FPREGS+208)(a0)) 117 EX(lwc1 $f27,(SC_FPREGS+216)(a0)) 118 EX(lwc1 $f28,(SC_FPREGS+224)(a0)) 119 EX(lwc1 $f29,(SC_FPREGS+232)(a0)) 120 EX(lwc1 $f30,(SC_FPREGS+240)(a0)) 121 EX(lwc1 $f31,(SC_FPREGS+248)(a0)) 122 jr ra 123 ctc1 t0,fcr31 124 .set pop 125 END(_restore_fp_context) 126 .set reorder 127 128 .type fault, @function 129 .ent fault 130fault: li v0, -EFAULT 131 jr ra 132 .end fault 133