1 /* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1992 Ross Biro 7 * Copyright (C) Linus Torvalds 8 * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle 9 * Copyright (C) 1996 David S. Miller 10 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com 11 * Copyright (C) 1999 MIPS Technologies, Inc. 12 * Copyright (C) 2000 Ulf Carlsson 13 * 14 * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit 15 * binaries. 16 */ 17 #include <linux/compiler.h> 18 #include <linux/compat.h> 19 #include <linux/kernel.h> 20 #include <linux/sched.h> 21 #include <linux/sched/task_stack.h> 22 #include <linux/mm.h> 23 #include <linux/errno.h> 24 #include <linux/ptrace.h> 25 #include <linux/smp.h> 26 #include <linux/security.h> 27 28 #include <asm/cpu.h> 29 #include <asm/dsp.h> 30 #include <asm/fpu.h> 31 #include <asm/mipsregs.h> 32 #include <asm/mipsmtregs.h> 33 #include <asm/pgtable.h> 34 #include <asm/page.h> 35 #include <asm/reg.h> 36 #include <asm/syscall.h> 37 #include <linux/uaccess.h> 38 #include <asm/bootinfo.h> 39 40 /* 41 * Tracing a 32-bit process with a 64-bit strace and vice versa will not 42 * work. I don't know how to fix this. 43 */ 44 long compat_arch_ptrace(struct task_struct *child, compat_long_t request, 45 compat_ulong_t caddr, compat_ulong_t cdata) 46 { 47 int addr = caddr; 48 int data = cdata; 49 int ret; 50 51 switch (request) { 52 53 /* 54 * Read 4 bytes of the other process' storage 55 * data is a pointer specifying where the user wants the 56 * 4 bytes copied into 57 * addr is a pointer in the user's storage that contains an 8 byte 58 * address in the other process of the 4 bytes that is to be read 59 * (this is run in a 32-bit process looking at a 64-bit process) 60 * when I and D space are separate, these will need to be fixed. 61 */ 62 case PTRACE_PEEKTEXT_3264: 63 case PTRACE_PEEKDATA_3264: { 64 u32 tmp; 65 int copied; 66 u32 __user * addrOthers; 67 68 ret = -EIO; 69 70 /* Get the addr in the other process that we want to read */ 71 if (get_user(addrOthers, (u32 __user * __user *) (unsigned long) addr) != 0) 72 break; 73 74 copied = ptrace_access_vm(child, (u64)addrOthers, &tmp, 75 sizeof(tmp), FOLL_FORCE); 76 if (copied != sizeof(tmp)) 77 break; 78 ret = put_user(tmp, (u32 __user *) (unsigned long) data); 79 break; 80 } 81 82 /* Read the word at location addr in the USER area. */ 83 case PTRACE_PEEKUSR: { 84 struct pt_regs *regs; 85 unsigned int tmp; 86 87 regs = task_pt_regs(child); 88 ret = 0; /* Default return value. */ 89 90 switch (addr) { 91 case 0 ... 31: 92 tmp = regs->regs[addr]; 93 break; 94 #ifdef CONFIG_MIPS_FP_SUPPORT 95 case FPR_BASE ... FPR_BASE + 31: { 96 union fpureg *fregs; 97 98 if (!tsk_used_math(child)) { 99 /* FP not yet used */ 100 tmp = -1; 101 break; 102 } 103 fregs = get_fpu_regs(child); 104 if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) { 105 /* 106 * The odd registers are actually the high 107 * order bits of the values stored in the even 108 * registers. 109 */ 110 tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE], 111 addr & 1); 112 break; 113 } 114 tmp = get_fpr64(&fregs[addr - FPR_BASE], 0); 115 break; 116 } 117 case FPC_CSR: 118 tmp = child->thread.fpu.fcr31; 119 break; 120 case FPC_EIR: 121 /* implementation / version register */ 122 tmp = boot_cpu_data.fpu_id; 123 break; 124 #endif /* CONFIG_MIPS_FP_SUPPORT */ 125 case PC: 126 tmp = regs->cp0_epc; 127 break; 128 case CAUSE: 129 tmp = regs->cp0_cause; 130 break; 131 case BADVADDR: 132 tmp = regs->cp0_badvaddr; 133 break; 134 case MMHI: 135 tmp = regs->hi; 136 break; 137 case MMLO: 138 tmp = regs->lo; 139 break; 140 case DSP_BASE ... DSP_BASE + 5: { 141 dspreg_t *dregs; 142 143 if (!cpu_has_dsp) { 144 tmp = 0; 145 ret = -EIO; 146 goto out; 147 } 148 dregs = __get_dsp_regs(child); 149 tmp = dregs[addr - DSP_BASE]; 150 break; 151 } 152 case DSP_CONTROL: 153 if (!cpu_has_dsp) { 154 tmp = 0; 155 ret = -EIO; 156 goto out; 157 } 158 tmp = child->thread.dsp.dspcontrol; 159 break; 160 default: 161 tmp = 0; 162 ret = -EIO; 163 goto out; 164 } 165 ret = put_user(tmp, (unsigned __user *) (unsigned long) data); 166 break; 167 } 168 169 /* 170 * Write 4 bytes into the other process' storage 171 * data is the 4 bytes that the user wants written 172 * addr is a pointer in the user's storage that contains an 173 * 8 byte address in the other process where the 4 bytes 174 * that is to be written 175 * (this is run in a 32-bit process looking at a 64-bit process) 176 * when I and D space are separate, these will need to be fixed. 177 */ 178 case PTRACE_POKETEXT_3264: 179 case PTRACE_POKEDATA_3264: { 180 u32 __user * addrOthers; 181 182 /* Get the addr in the other process that we want to write into */ 183 ret = -EIO; 184 if (get_user(addrOthers, (u32 __user * __user *) (unsigned long) addr) != 0) 185 break; 186 ret = 0; 187 if (ptrace_access_vm(child, (u64)addrOthers, &data, 188 sizeof(data), 189 FOLL_FORCE | FOLL_WRITE) == sizeof(data)) 190 break; 191 ret = -EIO; 192 break; 193 } 194 195 case PTRACE_POKEUSR: { 196 struct pt_regs *regs; 197 ret = 0; 198 regs = task_pt_regs(child); 199 200 switch (addr) { 201 case 0 ... 31: 202 regs->regs[addr] = data; 203 /* System call number may have been changed */ 204 if (addr == 2) 205 mips_syscall_update_nr(child, regs); 206 else if (addr == 4 && 207 mips_syscall_is_indirect(child, regs)) 208 mips_syscall_update_nr(child, regs); 209 break; 210 #ifdef CONFIG_MIPS_FP_SUPPORT 211 case FPR_BASE ... FPR_BASE + 31: { 212 union fpureg *fregs = get_fpu_regs(child); 213 214 if (!tsk_used_math(child)) { 215 /* FP not yet used */ 216 memset(&child->thread.fpu, ~0, 217 sizeof(child->thread.fpu)); 218 child->thread.fpu.fcr31 = 0; 219 } 220 if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) { 221 /* 222 * The odd registers are actually the high 223 * order bits of the values stored in the even 224 * registers. 225 */ 226 set_fpr32(&fregs[(addr & ~1) - FPR_BASE], 227 addr & 1, data); 228 break; 229 } 230 set_fpr64(&fregs[addr - FPR_BASE], 0, data); 231 break; 232 } 233 case FPC_CSR: 234 child->thread.fpu.fcr31 = data; 235 break; 236 #endif /* CONFIG_MIPS_FP_SUPPORT */ 237 case PC: 238 regs->cp0_epc = data; 239 break; 240 case MMHI: 241 regs->hi = data; 242 break; 243 case MMLO: 244 regs->lo = data; 245 break; 246 case DSP_BASE ... DSP_BASE + 5: { 247 dspreg_t *dregs; 248 249 if (!cpu_has_dsp) { 250 ret = -EIO; 251 break; 252 } 253 254 dregs = __get_dsp_regs(child); 255 dregs[addr - DSP_BASE] = data; 256 break; 257 } 258 case DSP_CONTROL: 259 if (!cpu_has_dsp) { 260 ret = -EIO; 261 break; 262 } 263 child->thread.dsp.dspcontrol = data; 264 break; 265 default: 266 /* The rest are not allowed. */ 267 ret = -EIO; 268 break; 269 } 270 break; 271 } 272 273 case PTRACE_GETREGS: 274 ret = ptrace_getregs(child, 275 (struct user_pt_regs __user *) (__u64) data); 276 break; 277 278 case PTRACE_SETREGS: 279 ret = ptrace_setregs(child, 280 (struct user_pt_regs __user *) (__u64) data); 281 break; 282 283 #ifdef CONFIG_MIPS_FP_SUPPORT 284 case PTRACE_GETFPREGS: 285 ret = ptrace_getfpregs(child, (__u32 __user *) (__u64) data); 286 break; 287 288 case PTRACE_SETFPREGS: 289 ret = ptrace_setfpregs(child, (__u32 __user *) (__u64) data); 290 break; 291 #endif 292 case PTRACE_GET_THREAD_AREA: 293 ret = put_user(task_thread_info(child)->tp_value, 294 (unsigned int __user *) (unsigned long) data); 295 break; 296 297 case PTRACE_GET_THREAD_AREA_3264: 298 ret = put_user(task_thread_info(child)->tp_value, 299 (unsigned long __user *) (unsigned long) data); 300 break; 301 302 case PTRACE_GET_WATCH_REGS: 303 ret = ptrace_get_watch_regs(child, 304 (struct pt_watch_regs __user *) (unsigned long) addr); 305 break; 306 307 case PTRACE_SET_WATCH_REGS: 308 ret = ptrace_set_watch_regs(child, 309 (struct pt_watch_regs __user *) (unsigned long) addr); 310 break; 311 312 default: 313 ret = compat_ptrace_request(child, request, addr, data); 314 break; 315 } 316 out: 317 return ret; 318 } 319