1 /* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1992 Ross Biro 7 * Copyright (C) Linus Torvalds 8 * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle 9 * Copyright (C) 1996 David S. Miller 10 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com 11 * Copyright (C) 1999 MIPS Technologies, Inc. 12 * Copyright (C) 2000 Ulf Carlsson 13 * 14 * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit 15 * binaries. 16 */ 17 #include <linux/compiler.h> 18 #include <linux/context_tracking.h> 19 #include <linux/elf.h> 20 #include <linux/kernel.h> 21 #include <linux/sched.h> 22 #include <linux/mm.h> 23 #include <linux/errno.h> 24 #include <linux/ptrace.h> 25 #include <linux/regset.h> 26 #include <linux/smp.h> 27 #include <linux/security.h> 28 #include <linux/stddef.h> 29 #include <linux/tracehook.h> 30 #include <linux/audit.h> 31 #include <linux/seccomp.h> 32 #include <linux/ftrace.h> 33 34 #include <asm/byteorder.h> 35 #include <asm/cpu.h> 36 #include <asm/cpu-info.h> 37 #include <asm/dsp.h> 38 #include <asm/fpu.h> 39 #include <asm/mipsregs.h> 40 #include <asm/mipsmtregs.h> 41 #include <asm/pgtable.h> 42 #include <asm/page.h> 43 #include <asm/syscall.h> 44 #include <linux/uaccess.h> 45 #include <asm/bootinfo.h> 46 #include <asm/reg.h> 47 48 #define CREATE_TRACE_POINTS 49 #include <trace/events/syscalls.h> 50 51 static void init_fp_ctx(struct task_struct *target) 52 { 53 /* If FP has been used then the target already has context */ 54 if (tsk_used_math(target)) 55 return; 56 57 /* Begin with data registers set to all 1s... */ 58 memset(&target->thread.fpu.fpr, ~0, sizeof(target->thread.fpu.fpr)); 59 60 /* FCSR has been preset by `mips_set_personality_nan'. */ 61 62 /* 63 * Record that the target has "used" math, such that the context 64 * just initialised, and any modifications made by the caller, 65 * aren't discarded. 66 */ 67 set_stopped_child_used_math(target); 68 } 69 70 /* 71 * Called by kernel/ptrace.c when detaching.. 72 * 73 * Make sure single step bits etc are not set. 74 */ 75 void ptrace_disable(struct task_struct *child) 76 { 77 /* Don't load the watchpoint registers for the ex-child. */ 78 clear_tsk_thread_flag(child, TIF_LOAD_WATCH); 79 } 80 81 /* 82 * Poke at FCSR according to its mask. Set the Cause bits even 83 * if a corresponding Enable bit is set. This will be noticed at 84 * the time the thread is switched to and SIGFPE thrown accordingly. 85 */ 86 static void ptrace_setfcr31(struct task_struct *child, u32 value) 87 { 88 u32 fcr31; 89 u32 mask; 90 91 fcr31 = child->thread.fpu.fcr31; 92 mask = boot_cpu_data.fpu_msk31; 93 child->thread.fpu.fcr31 = (value & ~mask) | (fcr31 & mask); 94 } 95 96 /* 97 * Read a general register set. We always use the 64-bit format, even 98 * for 32-bit kernels and for 32-bit processes on a 64-bit kernel. 99 * Registers are sign extended to fill the available space. 100 */ 101 int ptrace_getregs(struct task_struct *child, struct user_pt_regs __user *data) 102 { 103 struct pt_regs *regs; 104 int i; 105 106 if (!access_ok(VERIFY_WRITE, data, 38 * 8)) 107 return -EIO; 108 109 regs = task_pt_regs(child); 110 111 for (i = 0; i < 32; i++) 112 __put_user((long)regs->regs[i], (__s64 __user *)&data->regs[i]); 113 __put_user((long)regs->lo, (__s64 __user *)&data->lo); 114 __put_user((long)regs->hi, (__s64 __user *)&data->hi); 115 __put_user((long)regs->cp0_epc, (__s64 __user *)&data->cp0_epc); 116 __put_user((long)regs->cp0_badvaddr, (__s64 __user *)&data->cp0_badvaddr); 117 __put_user((long)regs->cp0_status, (__s64 __user *)&data->cp0_status); 118 __put_user((long)regs->cp0_cause, (__s64 __user *)&data->cp0_cause); 119 120 return 0; 121 } 122 123 /* 124 * Write a general register set. As for PTRACE_GETREGS, we always use 125 * the 64-bit format. On a 32-bit kernel only the lower order half 126 * (according to endianness) will be used. 127 */ 128 int ptrace_setregs(struct task_struct *child, struct user_pt_regs __user *data) 129 { 130 struct pt_regs *regs; 131 int i; 132 133 if (!access_ok(VERIFY_READ, data, 38 * 8)) 134 return -EIO; 135 136 regs = task_pt_regs(child); 137 138 for (i = 0; i < 32; i++) 139 __get_user(regs->regs[i], (__s64 __user *)&data->regs[i]); 140 __get_user(regs->lo, (__s64 __user *)&data->lo); 141 __get_user(regs->hi, (__s64 __user *)&data->hi); 142 __get_user(regs->cp0_epc, (__s64 __user *)&data->cp0_epc); 143 144 /* badvaddr, status, and cause may not be written. */ 145 146 return 0; 147 } 148 149 int ptrace_getfpregs(struct task_struct *child, __u32 __user *data) 150 { 151 int i; 152 153 if (!access_ok(VERIFY_WRITE, data, 33 * 8)) 154 return -EIO; 155 156 if (tsk_used_math(child)) { 157 union fpureg *fregs = get_fpu_regs(child); 158 for (i = 0; i < 32; i++) 159 __put_user(get_fpr64(&fregs[i], 0), 160 i + (__u64 __user *)data); 161 } else { 162 for (i = 0; i < 32; i++) 163 __put_user((__u64) -1, i + (__u64 __user *) data); 164 } 165 166 __put_user(child->thread.fpu.fcr31, data + 64); 167 __put_user(boot_cpu_data.fpu_id, data + 65); 168 169 return 0; 170 } 171 172 int ptrace_setfpregs(struct task_struct *child, __u32 __user *data) 173 { 174 union fpureg *fregs; 175 u64 fpr_val; 176 u32 value; 177 int i; 178 179 if (!access_ok(VERIFY_READ, data, 33 * 8)) 180 return -EIO; 181 182 init_fp_ctx(child); 183 fregs = get_fpu_regs(child); 184 185 for (i = 0; i < 32; i++) { 186 __get_user(fpr_val, i + (__u64 __user *)data); 187 set_fpr64(&fregs[i], 0, fpr_val); 188 } 189 190 __get_user(value, data + 64); 191 ptrace_setfcr31(child, value); 192 193 /* FIR may not be written. */ 194 195 return 0; 196 } 197 198 int ptrace_get_watch_regs(struct task_struct *child, 199 struct pt_watch_regs __user *addr) 200 { 201 enum pt_watch_style style; 202 int i; 203 204 if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0) 205 return -EIO; 206 if (!access_ok(VERIFY_WRITE, addr, sizeof(struct pt_watch_regs))) 207 return -EIO; 208 209 #ifdef CONFIG_32BIT 210 style = pt_watch_style_mips32; 211 #define WATCH_STYLE mips32 212 #else 213 style = pt_watch_style_mips64; 214 #define WATCH_STYLE mips64 215 #endif 216 217 __put_user(style, &addr->style); 218 __put_user(boot_cpu_data.watch_reg_use_cnt, 219 &addr->WATCH_STYLE.num_valid); 220 for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) { 221 __put_user(child->thread.watch.mips3264.watchlo[i], 222 &addr->WATCH_STYLE.watchlo[i]); 223 __put_user(child->thread.watch.mips3264.watchhi[i] & 224 (MIPS_WATCHHI_MASK | MIPS_WATCHHI_IRW), 225 &addr->WATCH_STYLE.watchhi[i]); 226 __put_user(boot_cpu_data.watch_reg_masks[i], 227 &addr->WATCH_STYLE.watch_masks[i]); 228 } 229 for (; i < 8; i++) { 230 __put_user(0, &addr->WATCH_STYLE.watchlo[i]); 231 __put_user(0, &addr->WATCH_STYLE.watchhi[i]); 232 __put_user(0, &addr->WATCH_STYLE.watch_masks[i]); 233 } 234 235 return 0; 236 } 237 238 int ptrace_set_watch_regs(struct task_struct *child, 239 struct pt_watch_regs __user *addr) 240 { 241 int i; 242 int watch_active = 0; 243 unsigned long lt[NUM_WATCH_REGS]; 244 u16 ht[NUM_WATCH_REGS]; 245 246 if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0) 247 return -EIO; 248 if (!access_ok(VERIFY_READ, addr, sizeof(struct pt_watch_regs))) 249 return -EIO; 250 /* Check the values. */ 251 for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) { 252 __get_user(lt[i], &addr->WATCH_STYLE.watchlo[i]); 253 #ifdef CONFIG_32BIT 254 if (lt[i] & __UA_LIMIT) 255 return -EINVAL; 256 #else 257 if (test_tsk_thread_flag(child, TIF_32BIT_ADDR)) { 258 if (lt[i] & 0xffffffff80000000UL) 259 return -EINVAL; 260 } else { 261 if (lt[i] & __UA_LIMIT) 262 return -EINVAL; 263 } 264 #endif 265 __get_user(ht[i], &addr->WATCH_STYLE.watchhi[i]); 266 if (ht[i] & ~MIPS_WATCHHI_MASK) 267 return -EINVAL; 268 } 269 /* Install them. */ 270 for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) { 271 if (lt[i] & MIPS_WATCHLO_IRW) 272 watch_active = 1; 273 child->thread.watch.mips3264.watchlo[i] = lt[i]; 274 /* Set the G bit. */ 275 child->thread.watch.mips3264.watchhi[i] = ht[i]; 276 } 277 278 if (watch_active) 279 set_tsk_thread_flag(child, TIF_LOAD_WATCH); 280 else 281 clear_tsk_thread_flag(child, TIF_LOAD_WATCH); 282 283 return 0; 284 } 285 286 /* regset get/set implementations */ 287 288 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32) 289 290 static int gpr32_get(struct task_struct *target, 291 const struct user_regset *regset, 292 unsigned int pos, unsigned int count, 293 void *kbuf, void __user *ubuf) 294 { 295 struct pt_regs *regs = task_pt_regs(target); 296 u32 uregs[ELF_NGREG] = {}; 297 298 mips_dump_regs32(uregs, regs); 299 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, 300 sizeof(uregs)); 301 } 302 303 static int gpr32_set(struct task_struct *target, 304 const struct user_regset *regset, 305 unsigned int pos, unsigned int count, 306 const void *kbuf, const void __user *ubuf) 307 { 308 struct pt_regs *regs = task_pt_regs(target); 309 u32 uregs[ELF_NGREG]; 310 unsigned start, num_regs, i; 311 int err; 312 313 start = pos / sizeof(u32); 314 num_regs = count / sizeof(u32); 315 316 if (start + num_regs > ELF_NGREG) 317 return -EIO; 318 319 err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0, 320 sizeof(uregs)); 321 if (err) 322 return err; 323 324 for (i = start; i < num_regs; i++) { 325 /* 326 * Cast all values to signed here so that if this is a 64-bit 327 * kernel, the supplied 32-bit values will be sign extended. 328 */ 329 switch (i) { 330 case MIPS32_EF_R1 ... MIPS32_EF_R25: 331 /* k0/k1 are ignored. */ 332 case MIPS32_EF_R28 ... MIPS32_EF_R31: 333 regs->regs[i - MIPS32_EF_R0] = (s32)uregs[i]; 334 break; 335 case MIPS32_EF_LO: 336 regs->lo = (s32)uregs[i]; 337 break; 338 case MIPS32_EF_HI: 339 regs->hi = (s32)uregs[i]; 340 break; 341 case MIPS32_EF_CP0_EPC: 342 regs->cp0_epc = (s32)uregs[i]; 343 break; 344 } 345 } 346 347 return 0; 348 } 349 350 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */ 351 352 #ifdef CONFIG_64BIT 353 354 static int gpr64_get(struct task_struct *target, 355 const struct user_regset *regset, 356 unsigned int pos, unsigned int count, 357 void *kbuf, void __user *ubuf) 358 { 359 struct pt_regs *regs = task_pt_regs(target); 360 u64 uregs[ELF_NGREG] = {}; 361 362 mips_dump_regs64(uregs, regs); 363 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, 364 sizeof(uregs)); 365 } 366 367 static int gpr64_set(struct task_struct *target, 368 const struct user_regset *regset, 369 unsigned int pos, unsigned int count, 370 const void *kbuf, const void __user *ubuf) 371 { 372 struct pt_regs *regs = task_pt_regs(target); 373 u64 uregs[ELF_NGREG]; 374 unsigned start, num_regs, i; 375 int err; 376 377 start = pos / sizeof(u64); 378 num_regs = count / sizeof(u64); 379 380 if (start + num_regs > ELF_NGREG) 381 return -EIO; 382 383 err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0, 384 sizeof(uregs)); 385 if (err) 386 return err; 387 388 for (i = start; i < num_regs; i++) { 389 switch (i) { 390 case MIPS64_EF_R1 ... MIPS64_EF_R25: 391 /* k0/k1 are ignored. */ 392 case MIPS64_EF_R28 ... MIPS64_EF_R31: 393 regs->regs[i - MIPS64_EF_R0] = uregs[i]; 394 break; 395 case MIPS64_EF_LO: 396 regs->lo = uregs[i]; 397 break; 398 case MIPS64_EF_HI: 399 regs->hi = uregs[i]; 400 break; 401 case MIPS64_EF_CP0_EPC: 402 regs->cp0_epc = uregs[i]; 403 break; 404 } 405 } 406 407 return 0; 408 } 409 410 #endif /* CONFIG_64BIT */ 411 412 static int fpr_get(struct task_struct *target, 413 const struct user_regset *regset, 414 unsigned int pos, unsigned int count, 415 void *kbuf, void __user *ubuf) 416 { 417 unsigned i; 418 int err; 419 u64 fpr_val; 420 421 /* XXX fcr31 */ 422 423 if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t)) 424 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, 425 &target->thread.fpu, 426 0, sizeof(elf_fpregset_t)); 427 428 for (i = 0; i < NUM_FPU_REGS; i++) { 429 fpr_val = get_fpr64(&target->thread.fpu.fpr[i], 0); 430 err = user_regset_copyout(&pos, &count, &kbuf, &ubuf, 431 &fpr_val, i * sizeof(elf_fpreg_t), 432 (i + 1) * sizeof(elf_fpreg_t)); 433 if (err) 434 return err; 435 } 436 437 return 0; 438 } 439 440 static int fpr_set(struct task_struct *target, 441 const struct user_regset *regset, 442 unsigned int pos, unsigned int count, 443 const void *kbuf, const void __user *ubuf) 444 { 445 unsigned i; 446 int err; 447 u64 fpr_val; 448 449 /* XXX fcr31 */ 450 451 init_fp_ctx(target); 452 453 if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t)) 454 return user_regset_copyin(&pos, &count, &kbuf, &ubuf, 455 &target->thread.fpu, 456 0, sizeof(elf_fpregset_t)); 457 458 for (i = 0; i < NUM_FPU_REGS; i++) { 459 err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, 460 &fpr_val, i * sizeof(elf_fpreg_t), 461 (i + 1) * sizeof(elf_fpreg_t)); 462 if (err) 463 return err; 464 set_fpr64(&target->thread.fpu.fpr[i], 0, fpr_val); 465 } 466 467 return 0; 468 } 469 470 enum mips_regset { 471 REGSET_GPR, 472 REGSET_FPR, 473 }; 474 475 struct pt_regs_offset { 476 const char *name; 477 int offset; 478 }; 479 480 #define REG_OFFSET_NAME(reg, r) { \ 481 .name = #reg, \ 482 .offset = offsetof(struct pt_regs, r) \ 483 } 484 485 #define REG_OFFSET_END { \ 486 .name = NULL, \ 487 .offset = 0 \ 488 } 489 490 static const struct pt_regs_offset regoffset_table[] = { 491 REG_OFFSET_NAME(r0, regs[0]), 492 REG_OFFSET_NAME(r1, regs[1]), 493 REG_OFFSET_NAME(r2, regs[2]), 494 REG_OFFSET_NAME(r3, regs[3]), 495 REG_OFFSET_NAME(r4, regs[4]), 496 REG_OFFSET_NAME(r5, regs[5]), 497 REG_OFFSET_NAME(r6, regs[6]), 498 REG_OFFSET_NAME(r7, regs[7]), 499 REG_OFFSET_NAME(r8, regs[8]), 500 REG_OFFSET_NAME(r9, regs[9]), 501 REG_OFFSET_NAME(r10, regs[10]), 502 REG_OFFSET_NAME(r11, regs[11]), 503 REG_OFFSET_NAME(r12, regs[12]), 504 REG_OFFSET_NAME(r13, regs[13]), 505 REG_OFFSET_NAME(r14, regs[14]), 506 REG_OFFSET_NAME(r15, regs[15]), 507 REG_OFFSET_NAME(r16, regs[16]), 508 REG_OFFSET_NAME(r17, regs[17]), 509 REG_OFFSET_NAME(r18, regs[18]), 510 REG_OFFSET_NAME(r19, regs[19]), 511 REG_OFFSET_NAME(r20, regs[20]), 512 REG_OFFSET_NAME(r21, regs[21]), 513 REG_OFFSET_NAME(r22, regs[22]), 514 REG_OFFSET_NAME(r23, regs[23]), 515 REG_OFFSET_NAME(r24, regs[24]), 516 REG_OFFSET_NAME(r25, regs[25]), 517 REG_OFFSET_NAME(r26, regs[26]), 518 REG_OFFSET_NAME(r27, regs[27]), 519 REG_OFFSET_NAME(r28, regs[28]), 520 REG_OFFSET_NAME(r29, regs[29]), 521 REG_OFFSET_NAME(r30, regs[30]), 522 REG_OFFSET_NAME(r31, regs[31]), 523 REG_OFFSET_NAME(c0_status, cp0_status), 524 REG_OFFSET_NAME(hi, hi), 525 REG_OFFSET_NAME(lo, lo), 526 #ifdef CONFIG_CPU_HAS_SMARTMIPS 527 REG_OFFSET_NAME(acx, acx), 528 #endif 529 REG_OFFSET_NAME(c0_badvaddr, cp0_badvaddr), 530 REG_OFFSET_NAME(c0_cause, cp0_cause), 531 REG_OFFSET_NAME(c0_epc, cp0_epc), 532 #ifdef CONFIG_CPU_CAVIUM_OCTEON 533 REG_OFFSET_NAME(mpl0, mpl[0]), 534 REG_OFFSET_NAME(mpl1, mpl[1]), 535 REG_OFFSET_NAME(mpl2, mpl[2]), 536 REG_OFFSET_NAME(mtp0, mtp[0]), 537 REG_OFFSET_NAME(mtp1, mtp[1]), 538 REG_OFFSET_NAME(mtp2, mtp[2]), 539 #endif 540 REG_OFFSET_END, 541 }; 542 543 /** 544 * regs_query_register_offset() - query register offset from its name 545 * @name: the name of a register 546 * 547 * regs_query_register_offset() returns the offset of a register in struct 548 * pt_regs from its name. If the name is invalid, this returns -EINVAL; 549 */ 550 int regs_query_register_offset(const char *name) 551 { 552 const struct pt_regs_offset *roff; 553 for (roff = regoffset_table; roff->name != NULL; roff++) 554 if (!strcmp(roff->name, name)) 555 return roff->offset; 556 return -EINVAL; 557 } 558 559 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32) 560 561 static const struct user_regset mips_regsets[] = { 562 [REGSET_GPR] = { 563 .core_note_type = NT_PRSTATUS, 564 .n = ELF_NGREG, 565 .size = sizeof(unsigned int), 566 .align = sizeof(unsigned int), 567 .get = gpr32_get, 568 .set = gpr32_set, 569 }, 570 [REGSET_FPR] = { 571 .core_note_type = NT_PRFPREG, 572 .n = ELF_NFPREG, 573 .size = sizeof(elf_fpreg_t), 574 .align = sizeof(elf_fpreg_t), 575 .get = fpr_get, 576 .set = fpr_set, 577 }, 578 }; 579 580 static const struct user_regset_view user_mips_view = { 581 .name = "mips", 582 .e_machine = ELF_ARCH, 583 .ei_osabi = ELF_OSABI, 584 .regsets = mips_regsets, 585 .n = ARRAY_SIZE(mips_regsets), 586 }; 587 588 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */ 589 590 #ifdef CONFIG_64BIT 591 592 static const struct user_regset mips64_regsets[] = { 593 [REGSET_GPR] = { 594 .core_note_type = NT_PRSTATUS, 595 .n = ELF_NGREG, 596 .size = sizeof(unsigned long), 597 .align = sizeof(unsigned long), 598 .get = gpr64_get, 599 .set = gpr64_set, 600 }, 601 [REGSET_FPR] = { 602 .core_note_type = NT_PRFPREG, 603 .n = ELF_NFPREG, 604 .size = sizeof(elf_fpreg_t), 605 .align = sizeof(elf_fpreg_t), 606 .get = fpr_get, 607 .set = fpr_set, 608 }, 609 }; 610 611 static const struct user_regset_view user_mips64_view = { 612 .name = "mips64", 613 .e_machine = ELF_ARCH, 614 .ei_osabi = ELF_OSABI, 615 .regsets = mips64_regsets, 616 .n = ARRAY_SIZE(mips64_regsets), 617 }; 618 619 #endif /* CONFIG_64BIT */ 620 621 const struct user_regset_view *task_user_regset_view(struct task_struct *task) 622 { 623 #ifdef CONFIG_32BIT 624 return &user_mips_view; 625 #else 626 #ifdef CONFIG_MIPS32_O32 627 if (test_tsk_thread_flag(task, TIF_32BIT_REGS)) 628 return &user_mips_view; 629 #endif 630 return &user_mips64_view; 631 #endif 632 } 633 634 long arch_ptrace(struct task_struct *child, long request, 635 unsigned long addr, unsigned long data) 636 { 637 int ret; 638 void __user *addrp = (void __user *) addr; 639 void __user *datavp = (void __user *) data; 640 unsigned long __user *datalp = (void __user *) data; 641 642 switch (request) { 643 /* when I and D space are separate, these will need to be fixed. */ 644 case PTRACE_PEEKTEXT: /* read word at location addr. */ 645 case PTRACE_PEEKDATA: 646 ret = generic_ptrace_peekdata(child, addr, data); 647 break; 648 649 /* Read the word at location addr in the USER area. */ 650 case PTRACE_PEEKUSR: { 651 struct pt_regs *regs; 652 union fpureg *fregs; 653 unsigned long tmp = 0; 654 655 regs = task_pt_regs(child); 656 ret = 0; /* Default return value. */ 657 658 switch (addr) { 659 case 0 ... 31: 660 tmp = regs->regs[addr]; 661 break; 662 case FPR_BASE ... FPR_BASE + 31: 663 if (!tsk_used_math(child)) { 664 /* FP not yet used */ 665 tmp = -1; 666 break; 667 } 668 fregs = get_fpu_regs(child); 669 670 #ifdef CONFIG_32BIT 671 if (test_thread_flag(TIF_32BIT_FPREGS)) { 672 /* 673 * The odd registers are actually the high 674 * order bits of the values stored in the even 675 * registers - unless we're using r2k_switch.S. 676 */ 677 tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE], 678 addr & 1); 679 break; 680 } 681 #endif 682 tmp = get_fpr32(&fregs[addr - FPR_BASE], 0); 683 break; 684 case PC: 685 tmp = regs->cp0_epc; 686 break; 687 case CAUSE: 688 tmp = regs->cp0_cause; 689 break; 690 case BADVADDR: 691 tmp = regs->cp0_badvaddr; 692 break; 693 case MMHI: 694 tmp = regs->hi; 695 break; 696 case MMLO: 697 tmp = regs->lo; 698 break; 699 #ifdef CONFIG_CPU_HAS_SMARTMIPS 700 case ACX: 701 tmp = regs->acx; 702 break; 703 #endif 704 case FPC_CSR: 705 tmp = child->thread.fpu.fcr31; 706 break; 707 case FPC_EIR: 708 /* implementation / version register */ 709 tmp = boot_cpu_data.fpu_id; 710 break; 711 case DSP_BASE ... DSP_BASE + 5: { 712 dspreg_t *dregs; 713 714 if (!cpu_has_dsp) { 715 tmp = 0; 716 ret = -EIO; 717 goto out; 718 } 719 dregs = __get_dsp_regs(child); 720 tmp = (unsigned long) (dregs[addr - DSP_BASE]); 721 break; 722 } 723 case DSP_CONTROL: 724 if (!cpu_has_dsp) { 725 tmp = 0; 726 ret = -EIO; 727 goto out; 728 } 729 tmp = child->thread.dsp.dspcontrol; 730 break; 731 default: 732 tmp = 0; 733 ret = -EIO; 734 goto out; 735 } 736 ret = put_user(tmp, datalp); 737 break; 738 } 739 740 /* when I and D space are separate, this will have to be fixed. */ 741 case PTRACE_POKETEXT: /* write the word at location addr. */ 742 case PTRACE_POKEDATA: 743 ret = generic_ptrace_pokedata(child, addr, data); 744 break; 745 746 case PTRACE_POKEUSR: { 747 struct pt_regs *regs; 748 ret = 0; 749 regs = task_pt_regs(child); 750 751 switch (addr) { 752 case 0 ... 31: 753 regs->regs[addr] = data; 754 break; 755 case FPR_BASE ... FPR_BASE + 31: { 756 union fpureg *fregs = get_fpu_regs(child); 757 758 init_fp_ctx(child); 759 #ifdef CONFIG_32BIT 760 if (test_thread_flag(TIF_32BIT_FPREGS)) { 761 /* 762 * The odd registers are actually the high 763 * order bits of the values stored in the even 764 * registers - unless we're using r2k_switch.S. 765 */ 766 set_fpr32(&fregs[(addr & ~1) - FPR_BASE], 767 addr & 1, data); 768 break; 769 } 770 #endif 771 set_fpr64(&fregs[addr - FPR_BASE], 0, data); 772 break; 773 } 774 case PC: 775 regs->cp0_epc = data; 776 break; 777 case MMHI: 778 regs->hi = data; 779 break; 780 case MMLO: 781 regs->lo = data; 782 break; 783 #ifdef CONFIG_CPU_HAS_SMARTMIPS 784 case ACX: 785 regs->acx = data; 786 break; 787 #endif 788 case FPC_CSR: 789 init_fp_ctx(child); 790 ptrace_setfcr31(child, data); 791 break; 792 case DSP_BASE ... DSP_BASE + 5: { 793 dspreg_t *dregs; 794 795 if (!cpu_has_dsp) { 796 ret = -EIO; 797 break; 798 } 799 800 dregs = __get_dsp_regs(child); 801 dregs[addr - DSP_BASE] = data; 802 break; 803 } 804 case DSP_CONTROL: 805 if (!cpu_has_dsp) { 806 ret = -EIO; 807 break; 808 } 809 child->thread.dsp.dspcontrol = data; 810 break; 811 default: 812 /* The rest are not allowed. */ 813 ret = -EIO; 814 break; 815 } 816 break; 817 } 818 819 case PTRACE_GETREGS: 820 ret = ptrace_getregs(child, datavp); 821 break; 822 823 case PTRACE_SETREGS: 824 ret = ptrace_setregs(child, datavp); 825 break; 826 827 case PTRACE_GETFPREGS: 828 ret = ptrace_getfpregs(child, datavp); 829 break; 830 831 case PTRACE_SETFPREGS: 832 ret = ptrace_setfpregs(child, datavp); 833 break; 834 835 case PTRACE_GET_THREAD_AREA: 836 ret = put_user(task_thread_info(child)->tp_value, datalp); 837 break; 838 839 case PTRACE_GET_WATCH_REGS: 840 ret = ptrace_get_watch_regs(child, addrp); 841 break; 842 843 case PTRACE_SET_WATCH_REGS: 844 ret = ptrace_set_watch_regs(child, addrp); 845 break; 846 847 default: 848 ret = ptrace_request(child, request, addr, data); 849 break; 850 } 851 out: 852 return ret; 853 } 854 855 /* 856 * Notification of system call entry/exit 857 * - triggered by current->work.syscall_trace 858 */ 859 asmlinkage long syscall_trace_enter(struct pt_regs *regs, long syscall) 860 { 861 user_exit(); 862 863 current_thread_info()->syscall = syscall; 864 865 if (test_thread_flag(TIF_SYSCALL_TRACE) && 866 tracehook_report_syscall_entry(regs)) 867 return -1; 868 869 if (secure_computing(NULL) == -1) 870 return -1; 871 872 if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) 873 trace_sys_enter(regs, regs->regs[2]); 874 875 audit_syscall_entry(syscall, regs->regs[4], regs->regs[5], 876 regs->regs[6], regs->regs[7]); 877 return syscall; 878 } 879 880 /* 881 * Notification of system call entry/exit 882 * - triggered by current->work.syscall_trace 883 */ 884 asmlinkage void syscall_trace_leave(struct pt_regs *regs) 885 { 886 /* 887 * We may come here right after calling schedule_user() 888 * or do_notify_resume(), in which case we can be in RCU 889 * user mode. 890 */ 891 user_exit(); 892 893 audit_syscall_exit(regs); 894 895 if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) 896 trace_sys_exit(regs, regs->regs[2]); 897 898 if (test_thread_flag(TIF_SYSCALL_TRACE)) 899 tracehook_report_syscall_exit(regs, 0); 900 901 user_enter(); 902 } 903