1 /* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others. 7 * Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org) 8 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 9 * Copyright (C) 2004 Thiemo Seufer 10 * Copyright (C) 2013 Imagination Technologies Ltd. 11 */ 12 #include <linux/errno.h> 13 #include <linux/sched.h> 14 #include <linux/sched/debug.h> 15 #include <linux/sched/task.h> 16 #include <linux/sched/task_stack.h> 17 #include <linux/tick.h> 18 #include <linux/kernel.h> 19 #include <linux/mm.h> 20 #include <linux/stddef.h> 21 #include <linux/unistd.h> 22 #include <linux/export.h> 23 #include <linux/ptrace.h> 24 #include <linux/mman.h> 25 #include <linux/personality.h> 26 #include <linux/sys.h> 27 #include <linux/init.h> 28 #include <linux/completion.h> 29 #include <linux/kallsyms.h> 30 #include <linux/random.h> 31 #include <linux/prctl.h> 32 33 #include <asm/asm.h> 34 #include <asm/bootinfo.h> 35 #include <asm/cpu.h> 36 #include <asm/dsemul.h> 37 #include <asm/dsp.h> 38 #include <asm/fpu.h> 39 #include <asm/irq.h> 40 #include <asm/msa.h> 41 #include <asm/pgtable.h> 42 #include <asm/mipsregs.h> 43 #include <asm/processor.h> 44 #include <asm/reg.h> 45 #include <linux/uaccess.h> 46 #include <asm/io.h> 47 #include <asm/elf.h> 48 #include <asm/isadep.h> 49 #include <asm/inst.h> 50 #include <asm/stacktrace.h> 51 #include <asm/irq_regs.h> 52 53 #ifdef CONFIG_HOTPLUG_CPU 54 void arch_cpu_idle_dead(void) 55 { 56 play_dead(); 57 } 58 #endif 59 60 asmlinkage void ret_from_fork(void); 61 asmlinkage void ret_from_kernel_thread(void); 62 63 void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp) 64 { 65 unsigned long status; 66 67 /* New thread loses kernel privileges. */ 68 status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK); 69 status |= KU_USER; 70 regs->cp0_status = status; 71 lose_fpu(0); 72 clear_thread_flag(TIF_MSA_CTX_LIVE); 73 clear_used_math(); 74 atomic_set(¤t->thread.bd_emu_frame, BD_EMUFRAME_NONE); 75 init_dsp(); 76 regs->cp0_epc = pc; 77 regs->regs[29] = sp; 78 } 79 80 void exit_thread(struct task_struct *tsk) 81 { 82 /* 83 * User threads may have allocated a delay slot emulation frame. 84 * If so, clean up that allocation. 85 */ 86 if (!(current->flags & PF_KTHREAD)) 87 dsemul_thread_cleanup(tsk); 88 } 89 90 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) 91 { 92 /* 93 * Save any process state which is live in hardware registers to the 94 * parent context prior to duplication. This prevents the new child 95 * state becoming stale if the parent is preempted before copy_thread() 96 * gets a chance to save the parent's live hardware registers to the 97 * child context. 98 */ 99 preempt_disable(); 100 101 if (is_msa_enabled()) 102 save_msa(current); 103 else if (is_fpu_owner()) 104 _save_fp(current); 105 106 save_dsp(current); 107 108 preempt_enable(); 109 110 *dst = *src; 111 return 0; 112 } 113 114 /* 115 * Copy architecture-specific thread state 116 */ 117 int copy_thread(unsigned long clone_flags, unsigned long usp, 118 unsigned long kthread_arg, struct task_struct *p) 119 { 120 struct thread_info *ti = task_thread_info(p); 121 struct pt_regs *childregs, *regs = current_pt_regs(); 122 unsigned long childksp; 123 p->set_child_tid = p->clear_child_tid = NULL; 124 125 childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32; 126 127 /* set up new TSS. */ 128 childregs = (struct pt_regs *) childksp - 1; 129 /* Put the stack after the struct pt_regs. */ 130 childksp = (unsigned long) childregs; 131 p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1); 132 if (unlikely(p->flags & PF_KTHREAD)) { 133 /* kernel thread */ 134 unsigned long status = p->thread.cp0_status; 135 memset(childregs, 0, sizeof(struct pt_regs)); 136 ti->addr_limit = KERNEL_DS; 137 p->thread.reg16 = usp; /* fn */ 138 p->thread.reg17 = kthread_arg; 139 p->thread.reg29 = childksp; 140 p->thread.reg31 = (unsigned long) ret_from_kernel_thread; 141 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) 142 status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) | 143 ((status & (ST0_KUC | ST0_IEC)) << 2); 144 #else 145 status |= ST0_EXL; 146 #endif 147 childregs->cp0_status = status; 148 return 0; 149 } 150 151 /* user thread */ 152 *childregs = *regs; 153 childregs->regs[7] = 0; /* Clear error flag */ 154 childregs->regs[2] = 0; /* Child gets zero as return value */ 155 if (usp) 156 childregs->regs[29] = usp; 157 ti->addr_limit = USER_DS; 158 159 p->thread.reg29 = (unsigned long) childregs; 160 p->thread.reg31 = (unsigned long) ret_from_fork; 161 162 /* 163 * New tasks lose permission to use the fpu. This accelerates context 164 * switching for most programs since they don't use the fpu. 165 */ 166 childregs->cp0_status &= ~(ST0_CU2|ST0_CU1); 167 168 clear_tsk_thread_flag(p, TIF_USEDFPU); 169 clear_tsk_thread_flag(p, TIF_USEDMSA); 170 clear_tsk_thread_flag(p, TIF_MSA_CTX_LIVE); 171 172 #ifdef CONFIG_MIPS_MT_FPAFF 173 clear_tsk_thread_flag(p, TIF_FPUBOUND); 174 #endif /* CONFIG_MIPS_MT_FPAFF */ 175 176 atomic_set(&p->thread.bd_emu_frame, BD_EMUFRAME_NONE); 177 178 if (clone_flags & CLONE_SETTLS) 179 ti->tp_value = regs->regs[7]; 180 181 return 0; 182 } 183 184 #ifdef CONFIG_CC_STACKPROTECTOR 185 #include <linux/stackprotector.h> 186 unsigned long __stack_chk_guard __read_mostly; 187 EXPORT_SYMBOL(__stack_chk_guard); 188 #endif 189 190 struct mips_frame_info { 191 void *func; 192 unsigned long func_size; 193 int frame_size; 194 int pc_offset; 195 }; 196 197 #define J_TARGET(pc,target) \ 198 (((unsigned long)(pc) & 0xf0000000) | ((target) << 2)) 199 200 static inline int is_ra_save_ins(union mips_instruction *ip, int *poff) 201 { 202 #ifdef CONFIG_CPU_MICROMIPS 203 /* 204 * swsp ra,offset 205 * swm16 reglist,offset(sp) 206 * swm32 reglist,offset(sp) 207 * sw32 ra,offset(sp) 208 * jradiussp - NOT SUPPORTED 209 * 210 * microMIPS is way more fun... 211 */ 212 if (mm_insn_16bit(ip->halfword[1])) { 213 switch (ip->mm16_r5_format.opcode) { 214 case mm_swsp16_op: 215 if (ip->mm16_r5_format.rt != 31) 216 return 0; 217 218 *poff = ip->mm16_r5_format.simmediate; 219 *poff = (*poff << 2) / sizeof(ulong); 220 return 1; 221 222 case mm_pool16c_op: 223 switch (ip->mm16_m_format.func) { 224 case mm_swm16_op: 225 *poff = ip->mm16_m_format.imm; 226 *poff += 1 + ip->mm16_m_format.rlist; 227 *poff = (*poff << 2) / sizeof(ulong); 228 return 1; 229 230 default: 231 return 0; 232 } 233 234 default: 235 return 0; 236 } 237 } 238 239 switch (ip->i_format.opcode) { 240 case mm_sw32_op: 241 if (ip->i_format.rs != 29) 242 return 0; 243 if (ip->i_format.rt != 31) 244 return 0; 245 246 *poff = ip->i_format.simmediate / sizeof(ulong); 247 return 1; 248 249 case mm_pool32b_op: 250 switch (ip->mm_m_format.func) { 251 case mm_swm32_func: 252 if (ip->mm_m_format.rd < 0x10) 253 return 0; 254 if (ip->mm_m_format.base != 29) 255 return 0; 256 257 *poff = ip->mm_m_format.simmediate; 258 *poff += (ip->mm_m_format.rd & 0xf) * sizeof(u32); 259 *poff /= sizeof(ulong); 260 return 1; 261 default: 262 return 0; 263 } 264 265 default: 266 return 0; 267 } 268 #else 269 /* sw / sd $ra, offset($sp) */ 270 if ((ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) && 271 ip->i_format.rs == 29 && ip->i_format.rt == 31) { 272 *poff = ip->i_format.simmediate / sizeof(ulong); 273 return 1; 274 } 275 276 return 0; 277 #endif 278 } 279 280 static inline int is_jump_ins(union mips_instruction *ip) 281 { 282 #ifdef CONFIG_CPU_MICROMIPS 283 /* 284 * jr16,jrc,jalr16,jalr16 285 * jal 286 * jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb 287 * jraddiusp - NOT SUPPORTED 288 * 289 * microMIPS is kind of more fun... 290 */ 291 if (mm_insn_16bit(ip->halfword[1])) { 292 if ((ip->mm16_r5_format.opcode == mm_pool16c_op && 293 (ip->mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op)) 294 return 1; 295 return 0; 296 } 297 298 if (ip->j_format.opcode == mm_j32_op) 299 return 1; 300 if (ip->j_format.opcode == mm_jal32_op) 301 return 1; 302 if (ip->r_format.opcode != mm_pool32a_op || 303 ip->r_format.func != mm_pool32axf_op) 304 return 0; 305 return ((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op; 306 #else 307 if (ip->j_format.opcode == j_op) 308 return 1; 309 if (ip->j_format.opcode == jal_op) 310 return 1; 311 if (ip->r_format.opcode != spec_op) 312 return 0; 313 return ip->r_format.func == jalr_op || ip->r_format.func == jr_op; 314 #endif 315 } 316 317 static inline int is_sp_move_ins(union mips_instruction *ip) 318 { 319 #ifdef CONFIG_CPU_MICROMIPS 320 /* 321 * addiusp -imm 322 * addius5 sp,-imm 323 * addiu32 sp,sp,-imm 324 * jradiussp - NOT SUPPORTED 325 * 326 * microMIPS is not more fun... 327 */ 328 if (mm_insn_16bit(ip->halfword[1])) { 329 return (ip->mm16_r3_format.opcode == mm_pool16d_op && 330 ip->mm16_r3_format.simmediate && mm_addiusp_func) || 331 (ip->mm16_r5_format.opcode == mm_pool16d_op && 332 ip->mm16_r5_format.rt == 29); 333 } 334 335 return ip->mm_i_format.opcode == mm_addiu32_op && 336 ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29; 337 #else 338 /* addiu/daddiu sp,sp,-imm */ 339 if (ip->i_format.rs != 29 || ip->i_format.rt != 29) 340 return 0; 341 if (ip->i_format.opcode == addiu_op || ip->i_format.opcode == daddiu_op) 342 return 1; 343 #endif 344 return 0; 345 } 346 347 static int get_frame_info(struct mips_frame_info *info) 348 { 349 bool is_mmips = IS_ENABLED(CONFIG_CPU_MICROMIPS); 350 union mips_instruction insn, *ip, *ip_end; 351 const unsigned int max_insns = 128; 352 unsigned int i; 353 354 info->pc_offset = -1; 355 info->frame_size = 0; 356 357 ip = (void *)msk_isa16_mode((ulong)info->func); 358 if (!ip) 359 goto err; 360 361 ip_end = (void *)ip + info->func_size; 362 363 for (i = 0; i < max_insns && ip < ip_end; i++, ip++) { 364 if (is_mmips && mm_insn_16bit(ip->halfword[0])) { 365 insn.halfword[0] = 0; 366 insn.halfword[1] = ip->halfword[0]; 367 } else if (is_mmips) { 368 insn.halfword[0] = ip->halfword[1]; 369 insn.halfword[1] = ip->halfword[0]; 370 } else { 371 insn.word = ip->word; 372 } 373 374 if (is_jump_ins(&insn)) 375 break; 376 377 if (!info->frame_size) { 378 if (is_sp_move_ins(&insn)) 379 { 380 #ifdef CONFIG_CPU_MICROMIPS 381 if (mm_insn_16bit(ip->halfword[0])) 382 { 383 unsigned short tmp; 384 385 if (ip->halfword[0] & mm_addiusp_func) 386 { 387 tmp = (((ip->halfword[0] >> 1) & 0x1ff) << 2); 388 info->frame_size = -(signed short)(tmp | ((tmp & 0x100) ? 0xfe00 : 0)); 389 } else { 390 tmp = (ip->halfword[0] >> 1); 391 info->frame_size = -(signed short)(tmp & 0xf); 392 } 393 ip = (void *) &ip->halfword[1]; 394 ip--; 395 } else 396 #endif 397 info->frame_size = - ip->i_format.simmediate; 398 } 399 continue; 400 } 401 if (info->pc_offset == -1 && 402 is_ra_save_ins(&insn, &info->pc_offset)) 403 break; 404 } 405 if (info->frame_size && info->pc_offset >= 0) /* nested */ 406 return 0; 407 if (info->pc_offset < 0) /* leaf */ 408 return 1; 409 /* prologue seems bogus... */ 410 err: 411 return -1; 412 } 413 414 static struct mips_frame_info schedule_mfi __read_mostly; 415 416 #ifdef CONFIG_KALLSYMS 417 static unsigned long get___schedule_addr(void) 418 { 419 return kallsyms_lookup_name("__schedule"); 420 } 421 #else 422 static unsigned long get___schedule_addr(void) 423 { 424 union mips_instruction *ip = (void *)schedule; 425 int max_insns = 8; 426 int i; 427 428 for (i = 0; i < max_insns; i++, ip++) { 429 if (ip->j_format.opcode == j_op) 430 return J_TARGET(ip, ip->j_format.target); 431 } 432 return 0; 433 } 434 #endif 435 436 static int __init frame_info_init(void) 437 { 438 unsigned long size = 0; 439 #ifdef CONFIG_KALLSYMS 440 unsigned long ofs; 441 #endif 442 unsigned long addr; 443 444 addr = get___schedule_addr(); 445 if (!addr) 446 addr = (unsigned long)schedule; 447 448 #ifdef CONFIG_KALLSYMS 449 kallsyms_lookup_size_offset(addr, &size, &ofs); 450 #endif 451 schedule_mfi.func = (void *)addr; 452 schedule_mfi.func_size = size; 453 454 get_frame_info(&schedule_mfi); 455 456 /* 457 * Without schedule() frame info, result given by 458 * thread_saved_pc() and get_wchan() are not reliable. 459 */ 460 if (schedule_mfi.pc_offset < 0) 461 printk("Can't analyze schedule() prologue at %p\n", schedule); 462 463 return 0; 464 } 465 466 arch_initcall(frame_info_init); 467 468 /* 469 * Return saved PC of a blocked thread. 470 */ 471 unsigned long thread_saved_pc(struct task_struct *tsk) 472 { 473 struct thread_struct *t = &tsk->thread; 474 475 /* New born processes are a special case */ 476 if (t->reg31 == (unsigned long) ret_from_fork) 477 return t->reg31; 478 if (schedule_mfi.pc_offset < 0) 479 return 0; 480 return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset]; 481 } 482 483 484 #ifdef CONFIG_KALLSYMS 485 /* generic stack unwinding function */ 486 unsigned long notrace unwind_stack_by_address(unsigned long stack_page, 487 unsigned long *sp, 488 unsigned long pc, 489 unsigned long *ra) 490 { 491 unsigned long low, high, irq_stack_high; 492 struct mips_frame_info info; 493 unsigned long size, ofs; 494 struct pt_regs *regs; 495 int leaf; 496 497 if (!stack_page) 498 return 0; 499 500 /* 501 * IRQ stacks start at IRQ_STACK_START 502 * task stacks at THREAD_SIZE - 32 503 */ 504 low = stack_page; 505 if (!preemptible() && on_irq_stack(raw_smp_processor_id(), *sp)) { 506 high = stack_page + IRQ_STACK_START; 507 irq_stack_high = high; 508 } else { 509 high = stack_page + THREAD_SIZE - 32; 510 irq_stack_high = 0; 511 } 512 513 /* 514 * If we reached the top of the interrupt stack, start unwinding 515 * the interrupted task stack. 516 */ 517 if (unlikely(*sp == irq_stack_high)) { 518 unsigned long task_sp = *(unsigned long *)*sp; 519 520 /* 521 * Check that the pointer saved in the IRQ stack head points to 522 * something within the stack of the current task 523 */ 524 if (!object_is_on_stack((void *)task_sp)) 525 return 0; 526 527 /* 528 * Follow pointer to tasks kernel stack frame where interrupted 529 * state was saved. 530 */ 531 regs = (struct pt_regs *)task_sp; 532 pc = regs->cp0_epc; 533 if (!user_mode(regs) && __kernel_text_address(pc)) { 534 *sp = regs->regs[29]; 535 *ra = regs->regs[31]; 536 return pc; 537 } 538 return 0; 539 } 540 if (!kallsyms_lookup_size_offset(pc, &size, &ofs)) 541 return 0; 542 /* 543 * Return ra if an exception occurred at the first instruction 544 */ 545 if (unlikely(ofs == 0)) { 546 pc = *ra; 547 *ra = 0; 548 return pc; 549 } 550 551 info.func = (void *)(pc - ofs); 552 info.func_size = ofs; /* analyze from start to ofs */ 553 leaf = get_frame_info(&info); 554 if (leaf < 0) 555 return 0; 556 557 if (*sp < low || *sp + info.frame_size > high) 558 return 0; 559 560 if (leaf) 561 /* 562 * For some extreme cases, get_frame_info() can 563 * consider wrongly a nested function as a leaf 564 * one. In that cases avoid to return always the 565 * same value. 566 */ 567 pc = pc != *ra ? *ra : 0; 568 else 569 pc = ((unsigned long *)(*sp))[info.pc_offset]; 570 571 *sp += info.frame_size; 572 *ra = 0; 573 return __kernel_text_address(pc) ? pc : 0; 574 } 575 EXPORT_SYMBOL(unwind_stack_by_address); 576 577 /* used by show_backtrace() */ 578 unsigned long unwind_stack(struct task_struct *task, unsigned long *sp, 579 unsigned long pc, unsigned long *ra) 580 { 581 unsigned long stack_page = 0; 582 int cpu; 583 584 for_each_possible_cpu(cpu) { 585 if (on_irq_stack(cpu, *sp)) { 586 stack_page = (unsigned long)irq_stack[cpu]; 587 break; 588 } 589 } 590 591 if (!stack_page) 592 stack_page = (unsigned long)task_stack_page(task); 593 594 return unwind_stack_by_address(stack_page, sp, pc, ra); 595 } 596 #endif 597 598 /* 599 * get_wchan - a maintenance nightmare^W^Wpain in the ass ... 600 */ 601 unsigned long get_wchan(struct task_struct *task) 602 { 603 unsigned long pc = 0; 604 #ifdef CONFIG_KALLSYMS 605 unsigned long sp; 606 unsigned long ra = 0; 607 #endif 608 609 if (!task || task == current || task->state == TASK_RUNNING) 610 goto out; 611 if (!task_stack_page(task)) 612 goto out; 613 614 pc = thread_saved_pc(task); 615 616 #ifdef CONFIG_KALLSYMS 617 sp = task->thread.reg29 + schedule_mfi.frame_size; 618 619 while (in_sched_functions(pc)) 620 pc = unwind_stack(task, &sp, pc, &ra); 621 #endif 622 623 out: 624 return pc; 625 } 626 627 /* 628 * Don't forget that the stack pointer must be aligned on a 8 bytes 629 * boundary for 32-bits ABI and 16 bytes for 64-bits ABI. 630 */ 631 unsigned long arch_align_stack(unsigned long sp) 632 { 633 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space) 634 sp -= get_random_int() & ~PAGE_MASK; 635 636 return sp & ALMASK; 637 } 638 639 static void arch_dump_stack(void *info) 640 { 641 struct pt_regs *regs; 642 643 regs = get_irq_regs(); 644 645 if (regs) 646 show_regs(regs); 647 648 dump_stack(); 649 } 650 651 void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self) 652 { 653 long this_cpu = get_cpu(); 654 655 if (cpumask_test_cpu(this_cpu, mask) && !exclude_self) 656 dump_stack(); 657 658 smp_call_function_many(mask, arch_dump_stack, NULL, 1); 659 660 put_cpu(); 661 } 662 663 int mips_get_process_fp_mode(struct task_struct *task) 664 { 665 int value = 0; 666 667 if (!test_tsk_thread_flag(task, TIF_32BIT_FPREGS)) 668 value |= PR_FP_MODE_FR; 669 if (test_tsk_thread_flag(task, TIF_HYBRID_FPREGS)) 670 value |= PR_FP_MODE_FRE; 671 672 return value; 673 } 674 675 static void prepare_for_fp_mode_switch(void *info) 676 { 677 struct mm_struct *mm = info; 678 679 if (current->mm == mm) 680 lose_fpu(1); 681 } 682 683 int mips_set_process_fp_mode(struct task_struct *task, unsigned int value) 684 { 685 const unsigned int known_bits = PR_FP_MODE_FR | PR_FP_MODE_FRE; 686 struct task_struct *t; 687 int max_users; 688 689 /* Check the value is valid */ 690 if (value & ~known_bits) 691 return -EOPNOTSUPP; 692 693 /* Avoid inadvertently triggering emulation */ 694 if ((value & PR_FP_MODE_FR) && raw_cpu_has_fpu && 695 !(raw_current_cpu_data.fpu_id & MIPS_FPIR_F64)) 696 return -EOPNOTSUPP; 697 if ((value & PR_FP_MODE_FRE) && raw_cpu_has_fpu && !cpu_has_fre) 698 return -EOPNOTSUPP; 699 700 /* FR = 0 not supported in MIPS R6 */ 701 if (!(value & PR_FP_MODE_FR) && raw_cpu_has_fpu && cpu_has_mips_r6) 702 return -EOPNOTSUPP; 703 704 /* Proceed with the mode switch */ 705 preempt_disable(); 706 707 /* Save FP & vector context, then disable FPU & MSA */ 708 if (task->signal == current->signal) 709 lose_fpu(1); 710 711 /* Prevent any threads from obtaining live FP context */ 712 atomic_set(&task->mm->context.fp_mode_switching, 1); 713 smp_mb__after_atomic(); 714 715 /* 716 * If there are multiple online CPUs then force any which are running 717 * threads in this process to lose their FPU context, which they can't 718 * regain until fp_mode_switching is cleared later. 719 */ 720 if (num_online_cpus() > 1) { 721 /* No need to send an IPI for the local CPU */ 722 max_users = (task->mm == current->mm) ? 1 : 0; 723 724 if (atomic_read(¤t->mm->mm_users) > max_users) 725 smp_call_function(prepare_for_fp_mode_switch, 726 (void *)current->mm, 1); 727 } 728 729 /* 730 * There are now no threads of the process with live FP context, so it 731 * is safe to proceed with the FP mode switch. 732 */ 733 for_each_thread(task, t) { 734 /* Update desired FP register width */ 735 if (value & PR_FP_MODE_FR) { 736 clear_tsk_thread_flag(t, TIF_32BIT_FPREGS); 737 } else { 738 set_tsk_thread_flag(t, TIF_32BIT_FPREGS); 739 clear_tsk_thread_flag(t, TIF_MSA_CTX_LIVE); 740 } 741 742 /* Update desired FP single layout */ 743 if (value & PR_FP_MODE_FRE) 744 set_tsk_thread_flag(t, TIF_HYBRID_FPREGS); 745 else 746 clear_tsk_thread_flag(t, TIF_HYBRID_FPREGS); 747 } 748 749 /* Allow threads to use FP again */ 750 atomic_set(&task->mm->context.fp_mode_switching, 0); 751 preempt_enable(); 752 753 return 0; 754 } 755 756 #if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32) 757 void mips_dump_regs32(u32 *uregs, const struct pt_regs *regs) 758 { 759 unsigned int i; 760 761 for (i = MIPS32_EF_R1; i <= MIPS32_EF_R31; i++) { 762 /* k0/k1 are copied as zero. */ 763 if (i == MIPS32_EF_R26 || i == MIPS32_EF_R27) 764 uregs[i] = 0; 765 else 766 uregs[i] = regs->regs[i - MIPS32_EF_R0]; 767 } 768 769 uregs[MIPS32_EF_LO] = regs->lo; 770 uregs[MIPS32_EF_HI] = regs->hi; 771 uregs[MIPS32_EF_CP0_EPC] = regs->cp0_epc; 772 uregs[MIPS32_EF_CP0_BADVADDR] = regs->cp0_badvaddr; 773 uregs[MIPS32_EF_CP0_STATUS] = regs->cp0_status; 774 uregs[MIPS32_EF_CP0_CAUSE] = regs->cp0_cause; 775 } 776 #endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */ 777 778 #ifdef CONFIG_64BIT 779 void mips_dump_regs64(u64 *uregs, const struct pt_regs *regs) 780 { 781 unsigned int i; 782 783 for (i = MIPS64_EF_R1; i <= MIPS64_EF_R31; i++) { 784 /* k0/k1 are copied as zero. */ 785 if (i == MIPS64_EF_R26 || i == MIPS64_EF_R27) 786 uregs[i] = 0; 787 else 788 uregs[i] = regs->regs[i - MIPS64_EF_R0]; 789 } 790 791 uregs[MIPS64_EF_LO] = regs->lo; 792 uregs[MIPS64_EF_HI] = regs->hi; 793 uregs[MIPS64_EF_CP0_EPC] = regs->cp0_epc; 794 uregs[MIPS64_EF_CP0_BADVADDR] = regs->cp0_badvaddr; 795 uregs[MIPS64_EF_CP0_STATUS] = regs->cp0_status; 796 uregs[MIPS64_EF_CP0_CAUSE] = regs->cp0_cause; 797 } 798 #endif /* CONFIG_64BIT */ 799