xref: /openbmc/linux/arch/mips/kernel/proc.c (revision f15cbe6f1a4b4d9df59142fc8e4abb973302cf44)
1 /*
2  *  linux/arch/mips/kernel/proc.c
3  *
4  *  Copyright (C) 1995, 1996, 2001  Ralf Baechle
5  *  Copyright (C) 2001, 2004  MIPS Technologies, Inc.
6  *  Copyright (C) 2004  Maciej W. Rozycki
7  */
8 #include <linux/delay.h>
9 #include <linux/kernel.h>
10 #include <linux/sched.h>
11 #include <linux/seq_file.h>
12 #include <asm/bootinfo.h>
13 #include <asm/cpu.h>
14 #include <asm/cpu-features.h>
15 #include <asm/mipsregs.h>
16 #include <asm/processor.h>
17 
18 unsigned int vced_count, vcei_count;
19 
20 static int show_cpuinfo(struct seq_file *m, void *v)
21 {
22 	unsigned long n = (unsigned long) v - 1;
23 	unsigned int version = cpu_data[n].processor_id;
24 	unsigned int fp_vers = cpu_data[n].fpu_id;
25 	char fmt [64];
26 
27 #ifdef CONFIG_SMP
28 	if (!cpu_isset(n, cpu_online_map))
29 		return 0;
30 #endif
31 
32 	/*
33 	 * For the first processor also print the system type
34 	 */
35 	if (n == 0)
36 		seq_printf(m, "system type\t\t: %s\n", get_system_type());
37 
38 	seq_printf(m, "processor\t\t: %ld\n", n);
39 	sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n",
40 	        cpu_data[n].options & MIPS_CPU_FPU ? "  FPU V%d.%d" : "");
41 	seq_printf(m, fmt, __cpu_name[smp_processor_id()],
42 	                           (version >> 4) & 0x0f, version & 0x0f,
43 	                           (fp_vers >> 4) & 0x0f, fp_vers & 0x0f);
44 	seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n",
45 	              cpu_data[n].udelay_val / (500000/HZ),
46 	              (cpu_data[n].udelay_val / (5000/HZ)) % 100);
47 	seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no");
48 	seq_printf(m, "microsecond timers\t: %s\n",
49 	              cpu_has_counter ? "yes" : "no");
50 	seq_printf(m, "tlb_entries\t\t: %d\n", cpu_data[n].tlbsize);
51 	seq_printf(m, "extra interrupt vector\t: %s\n",
52 	              cpu_has_divec ? "yes" : "no");
53 	seq_printf(m, "hardware watchpoint\t: %s\n",
54 	              cpu_has_watch ? "yes" : "no");
55 	seq_printf(m, "ASEs implemented\t:%s%s%s%s%s%s\n",
56 		      cpu_has_mips16 ? " mips16" : "",
57 		      cpu_has_mdmx ? " mdmx" : "",
58 		      cpu_has_mips3d ? " mips3d" : "",
59 		      cpu_has_smartmips ? " smartmips" : "",
60 		      cpu_has_dsp ? " dsp" : "",
61 		      cpu_has_mipsmt ? " mt" : ""
62 		);
63 	seq_printf(m, "shadow register sets\t: %d\n",
64 		       cpu_data[n].srsets);
65 	seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core);
66 
67 	sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
68 	        cpu_has_vce ? "%u" : "not available");
69 	seq_printf(m, fmt, 'D', vced_count);
70 	seq_printf(m, fmt, 'I', vcei_count);
71 	seq_printf(m, "\n");
72 
73 	return 0;
74 }
75 
76 static void *c_start(struct seq_file *m, loff_t *pos)
77 {
78 	unsigned long i = *pos;
79 
80 	return i < NR_CPUS ? (void *) (i + 1) : NULL;
81 }
82 
83 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
84 {
85 	++*pos;
86 	return c_start(m, pos);
87 }
88 
89 static void c_stop(struct seq_file *m, void *v)
90 {
91 }
92 
93 const struct seq_operations cpuinfo_op = {
94 	.start	= c_start,
95 	.next	= c_next,
96 	.stop	= c_stop,
97 	.show	= show_cpuinfo,
98 };
99