xref: /openbmc/linux/arch/mips/kernel/proc.c (revision cdfce539)
1 /*
2  *  Copyright (C) 1995, 1996, 2001  Ralf Baechle
3  *  Copyright (C) 2001, 2004  MIPS Technologies, Inc.
4  *  Copyright (C) 2004	Maciej W. Rozycki
5  */
6 #include <linux/delay.h>
7 #include <linux/kernel.h>
8 #include <linux/sched.h>
9 #include <linux/seq_file.h>
10 #include <asm/bootinfo.h>
11 #include <asm/cpu.h>
12 #include <asm/cpu-features.h>
13 #include <asm/idle.h>
14 #include <asm/mipsregs.h>
15 #include <asm/processor.h>
16 #include <asm/prom.h>
17 
18 unsigned int vced_count, vcei_count;
19 
20 static int show_cpuinfo(struct seq_file *m, void *v)
21 {
22 	unsigned long n = (unsigned long) v - 1;
23 	unsigned int version = cpu_data[n].processor_id;
24 	unsigned int fp_vers = cpu_data[n].fpu_id;
25 	char fmt [64];
26 	int i;
27 
28 #ifdef CONFIG_SMP
29 	if (!cpu_online(n))
30 		return 0;
31 #endif
32 
33 	/*
34 	 * For the first processor also print the system type
35 	 */
36 	if (n == 0) {
37 		seq_printf(m, "system type\t\t: %s\n", get_system_type());
38 		if (mips_get_machine_name())
39 			seq_printf(m, "machine\t\t\t: %s\n",
40 				   mips_get_machine_name());
41 	}
42 
43 	seq_printf(m, "processor\t\t: %ld\n", n);
44 	sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n",
45 		      cpu_data[n].options & MIPS_CPU_FPU ? "  FPU V%d.%d" : "");
46 	seq_printf(m, fmt, __cpu_name[n],
47 		      (version >> 4) & 0x0f, version & 0x0f,
48 		      (fp_vers >> 4) & 0x0f, fp_vers & 0x0f);
49 	seq_printf(m, "BogoMIPS\t\t: %u.%02u\n",
50 		      cpu_data[n].udelay_val / (500000/HZ),
51 		      (cpu_data[n].udelay_val / (5000/HZ)) % 100);
52 	seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no");
53 	seq_printf(m, "microsecond timers\t: %s\n",
54 		      cpu_has_counter ? "yes" : "no");
55 	seq_printf(m, "tlb_entries\t\t: %d\n", cpu_data[n].tlbsize);
56 	seq_printf(m, "extra interrupt vector\t: %s\n",
57 		      cpu_has_divec ? "yes" : "no");
58 	seq_printf(m, "hardware watchpoint\t: %s",
59 		      cpu_has_watch ? "yes, " : "no\n");
60 	if (cpu_has_watch) {
61 		seq_printf(m, "count: %d, address/irw mask: [",
62 		      cpu_data[n].watch_reg_count);
63 		for (i = 0; i < cpu_data[n].watch_reg_count; i++)
64 			seq_printf(m, "%s0x%04x", i ? ", " : "" ,
65 				cpu_data[n].watch_reg_masks[i]);
66 		seq_printf(m, "]\n");
67 	}
68 	if (cpu_has_mips_r) {
69 		seq_printf(m, "isa\t\t\t:");
70 		if (cpu_has_mips_1)
71 			seq_printf(m, "%s", " mips1");
72 		if (cpu_has_mips_2)
73 			seq_printf(m, "%s", " mips2");
74 		if (cpu_has_mips_3)
75 			seq_printf(m, "%s", " mips3");
76 		if (cpu_has_mips_4)
77 			seq_printf(m, "%s", " mips4");
78 		if (cpu_has_mips_5)
79 			seq_printf(m, "%s", " mips5");
80 		if (cpu_has_mips32r1)
81 			seq_printf(m, "%s", " mips32r1");
82 		if (cpu_has_mips32r2)
83 			seq_printf(m, "%s", " mips32r2");
84 		if (cpu_has_mips64r1)
85 			seq_printf(m, "%s", " mips64r1");
86 		if (cpu_has_mips64r2)
87 			seq_printf(m, "%s", " mips64r2");
88 		seq_printf(m, "\n");
89 	}
90 
91 	seq_printf(m, "ASEs implemented\t:");
92 	if (cpu_has_mips16)	seq_printf(m, "%s", " mips16");
93 	if (cpu_has_mdmx)	seq_printf(m, "%s", " mdmx");
94 	if (cpu_has_mips3d)	seq_printf(m, "%s", " mips3d");
95 	if (cpu_has_smartmips)	seq_printf(m, "%s", " smartmips");
96 	if (cpu_has_dsp)	seq_printf(m, "%s", " dsp");
97 	if (cpu_has_dsp2)	seq_printf(m, "%s", " dsp2");
98 	if (cpu_has_mipsmt)	seq_printf(m, "%s", " mt");
99 	if (cpu_has_mmips)	seq_printf(m, "%s", " micromips");
100 	if (cpu_has_vz)		seq_printf(m, "%s", " vz");
101 	seq_printf(m, "\n");
102 
103 	if (cpu_has_mmips) {
104 		seq_printf(m, "micromips kernel\t: %s\n",
105 		      (read_c0_config3() & MIPS_CONF3_ISA_OE) ?  "yes" : "no");
106 	}
107 	seq_printf(m, "shadow register sets\t: %d\n",
108 		      cpu_data[n].srsets);
109 	seq_printf(m, "kscratch registers\t: %d\n",
110 		      hweight8(cpu_data[n].kscratch_mask));
111 	seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core);
112 
113 	sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
114 		      cpu_has_vce ? "%u" : "not available");
115 	seq_printf(m, fmt, 'D', vced_count);
116 	seq_printf(m, fmt, 'I', vcei_count);
117 	seq_printf(m, "\n");
118 
119 	return 0;
120 }
121 
122 static void *c_start(struct seq_file *m, loff_t *pos)
123 {
124 	unsigned long i = *pos;
125 
126 	return i < NR_CPUS ? (void *) (i + 1) : NULL;
127 }
128 
129 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
130 {
131 	++*pos;
132 	return c_start(m, pos);
133 }
134 
135 static void c_stop(struct seq_file *m, void *v)
136 {
137 }
138 
139 const struct seq_operations cpuinfo_op = {
140 	.start	= c_start,
141 	.next	= c_next,
142 	.stop	= c_stop,
143 	.show	= show_cpuinfo,
144 };
145