1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 1995, 1996, 2001 Ralf Baechle 4 * Copyright (C) 2001, 2004 MIPS Technologies, Inc. 5 * Copyright (C) 2004 Maciej W. Rozycki 6 */ 7 #include <linux/delay.h> 8 #include <linux/kernel.h> 9 #include <linux/sched.h> 10 #include <linux/seq_file.h> 11 #include <asm/bootinfo.h> 12 #include <asm/cpu.h> 13 #include <asm/cpu-features.h> 14 #include <asm/idle.h> 15 #include <asm/mipsregs.h> 16 #include <asm/processor.h> 17 #include <asm/prom.h> 18 19 unsigned int vced_count, vcei_count; 20 21 /* 22 * * No lock; only written during early bootup by CPU 0. 23 * */ 24 static RAW_NOTIFIER_HEAD(proc_cpuinfo_chain); 25 26 int __ref register_proc_cpuinfo_notifier(struct notifier_block *nb) 27 { 28 return raw_notifier_chain_register(&proc_cpuinfo_chain, nb); 29 } 30 31 int proc_cpuinfo_notifier_call_chain(unsigned long val, void *v) 32 { 33 return raw_notifier_call_chain(&proc_cpuinfo_chain, val, v); 34 } 35 36 static int show_cpuinfo(struct seq_file *m, void *v) 37 { 38 struct proc_cpuinfo_notifier_args proc_cpuinfo_notifier_args; 39 unsigned long n = (unsigned long) v - 1; 40 unsigned int version = cpu_data[n].processor_id; 41 unsigned int fp_vers = cpu_data[n].fpu_id; 42 char fmt [64]; 43 int i; 44 45 #ifdef CONFIG_SMP 46 if (!cpu_online(n)) 47 return 0; 48 #endif 49 50 /* 51 * For the first processor also print the system type 52 */ 53 if (n == 0) { 54 seq_printf(m, "system type\t\t: %s\n", get_system_type()); 55 if (mips_get_machine_name()) 56 seq_printf(m, "machine\t\t\t: %s\n", 57 mips_get_machine_name()); 58 } 59 60 seq_printf(m, "processor\t\t: %ld\n", n); 61 sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n", 62 cpu_data[n].options & MIPS_CPU_FPU ? " FPU V%d.%d" : ""); 63 seq_printf(m, fmt, __cpu_name[n], 64 (version >> 4) & 0x0f, version & 0x0f, 65 (fp_vers >> 4) & 0x0f, fp_vers & 0x0f); 66 seq_printf(m, "BogoMIPS\t\t: %u.%02u\n", 67 cpu_data[n].udelay_val / (500000/HZ), 68 (cpu_data[n].udelay_val / (5000/HZ)) % 100); 69 seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no"); 70 seq_printf(m, "microsecond timers\t: %s\n", 71 cpu_has_counter ? "yes" : "no"); 72 seq_printf(m, "tlb_entries\t\t: %d\n", cpu_data[n].tlbsize); 73 seq_printf(m, "extra interrupt vector\t: %s\n", 74 cpu_has_divec ? "yes" : "no"); 75 seq_printf(m, "hardware watchpoint\t: %s", 76 cpu_has_watch ? "yes, " : "no\n"); 77 if (cpu_has_watch) { 78 seq_printf(m, "count: %d, address/irw mask: [", 79 cpu_data[n].watch_reg_count); 80 for (i = 0; i < cpu_data[n].watch_reg_count; i++) 81 seq_printf(m, "%s0x%04x", i ? ", " : "" , 82 cpu_data[n].watch_reg_masks[i]); 83 seq_printf(m, "]\n"); 84 } 85 86 seq_printf(m, "isa\t\t\t:"); 87 if (cpu_has_mips_1) 88 seq_printf(m, " mips1"); 89 if (cpu_has_mips_2) 90 seq_printf(m, "%s", " mips2"); 91 if (cpu_has_mips_3) 92 seq_printf(m, "%s", " mips3"); 93 if (cpu_has_mips_4) 94 seq_printf(m, "%s", " mips4"); 95 if (cpu_has_mips_5) 96 seq_printf(m, "%s", " mips5"); 97 if (cpu_has_mips32r1) 98 seq_printf(m, "%s", " mips32r1"); 99 if (cpu_has_mips32r2) 100 seq_printf(m, "%s", " mips32r2"); 101 if (cpu_has_mips32r5) 102 seq_printf(m, "%s", " mips32r5"); 103 if (cpu_has_mips32r6) 104 seq_printf(m, "%s", " mips32r6"); 105 if (cpu_has_mips64r1) 106 seq_printf(m, "%s", " mips64r1"); 107 if (cpu_has_mips64r2) 108 seq_printf(m, "%s", " mips64r2"); 109 if (cpu_has_mips64r5) 110 seq_printf(m, "%s", " mips64r5"); 111 if (cpu_has_mips64r6) 112 seq_printf(m, "%s", " mips64r6"); 113 seq_printf(m, "\n"); 114 115 seq_printf(m, "ASEs implemented\t:"); 116 if (cpu_has_mips16) seq_printf(m, "%s", " mips16"); 117 if (cpu_has_mips16e2) seq_printf(m, "%s", " mips16e2"); 118 if (cpu_has_mdmx) seq_printf(m, "%s", " mdmx"); 119 if (cpu_has_mips3d) seq_printf(m, "%s", " mips3d"); 120 if (cpu_has_smartmips) seq_printf(m, "%s", " smartmips"); 121 if (cpu_has_dsp) seq_printf(m, "%s", " dsp"); 122 if (cpu_has_dsp2) seq_printf(m, "%s", " dsp2"); 123 if (cpu_has_dsp3) seq_printf(m, "%s", " dsp3"); 124 if (cpu_has_mipsmt) seq_printf(m, "%s", " mt"); 125 if (cpu_has_mmips) seq_printf(m, "%s", " micromips"); 126 if (cpu_has_vz) seq_printf(m, "%s", " vz"); 127 if (cpu_has_msa) seq_printf(m, "%s", " msa"); 128 if (cpu_has_eva) seq_printf(m, "%s", " eva"); 129 if (cpu_has_htw) seq_printf(m, "%s", " htw"); 130 if (cpu_has_xpa) seq_printf(m, "%s", " xpa"); 131 if (cpu_has_loongson_mmi) seq_printf(m, "%s", " loongson-mmi"); 132 if (cpu_has_loongson_cam) seq_printf(m, "%s", " loongson-cam"); 133 if (cpu_has_loongson_ext) seq_printf(m, "%s", " loongson-ext"); 134 if (cpu_has_loongson_ext2) seq_printf(m, "%s", " loongson-ext2"); 135 seq_printf(m, "\n"); 136 137 if (cpu_has_mmips) { 138 seq_printf(m, "micromips kernel\t: %s\n", 139 (read_c0_config3() & MIPS_CONF3_ISA_OE) ? "yes" : "no"); 140 } 141 seq_printf(m, "shadow register sets\t: %d\n", 142 cpu_data[n].srsets); 143 seq_printf(m, "kscratch registers\t: %d\n", 144 hweight8(cpu_data[n].kscratch_mask)); 145 seq_printf(m, "package\t\t\t: %d\n", cpu_data[n].package); 146 seq_printf(m, "core\t\t\t: %d\n", cpu_core(&cpu_data[n])); 147 148 #if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_CPU_MIPSR6) 149 if (cpu_has_mipsmt) 150 seq_printf(m, "VPE\t\t\t: %d\n", cpu_vpe_id(&cpu_data[n])); 151 else if (cpu_has_vp) 152 seq_printf(m, "VP\t\t\t: %d\n", cpu_vpe_id(&cpu_data[n])); 153 #endif 154 155 sprintf(fmt, "VCE%%c exceptions\t\t: %s\n", 156 cpu_has_vce ? "%u" : "not available"); 157 seq_printf(m, fmt, 'D', vced_count); 158 seq_printf(m, fmt, 'I', vcei_count); 159 160 proc_cpuinfo_notifier_args.m = m; 161 proc_cpuinfo_notifier_args.n = n; 162 163 raw_notifier_call_chain(&proc_cpuinfo_chain, 0, 164 &proc_cpuinfo_notifier_args); 165 166 seq_printf(m, "\n"); 167 168 return 0; 169 } 170 171 static void *c_start(struct seq_file *m, loff_t *pos) 172 { 173 unsigned long i = *pos; 174 175 return i < NR_CPUS ? (void *) (i + 1) : NULL; 176 } 177 178 static void *c_next(struct seq_file *m, void *v, loff_t *pos) 179 { 180 ++*pos; 181 return c_start(m, pos); 182 } 183 184 static void c_stop(struct seq_file *m, void *v) 185 { 186 } 187 188 const struct seq_operations cpuinfo_op = { 189 .start = c_start, 190 .next = c_next, 191 .stop = c_stop, 192 .show = show_cpuinfo, 193 }; 194