1/* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1994, 1995 Waldorf Electronics 7 * Written by Ralf Baechle and Andreas Busse 8 * Copyright (C) 1994 - 99, 2003, 06 Ralf Baechle 9 * Copyright (C) 1996 Paul M. Antoine 10 * Modified for DECStation and hence R3000 support by Paul M. Antoine 11 * Further modifications by David S. Miller and Harald Koerfgen 12 * Copyright (C) 1999 Silicon Graphics, Inc. 13 * Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com 14 * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. 15 */ 16#include <linux/init.h> 17#include <linux/threads.h> 18 19#include <asm/addrspace.h> 20#include <asm/asm.h> 21#include <asm/asmmacro.h> 22#include <asm/irqflags.h> 23#include <asm/regdef.h> 24#include <asm/mipsregs.h> 25#include <asm/stackframe.h> 26 27#include <kernel-entry-init.h> 28 29 /* 30 * For the moment disable interrupts, mark the kernel mode and 31 * set ST0_KX so that the CPU does not spit fire when using 32 * 64-bit addresses. A full initialization of the CPU's status 33 * register is done later in per_cpu_trap_init(). 34 */ 35 .macro setup_c0_status set clr 36 .set push 37 mfc0 t0, CP0_STATUS 38 or t0, ST0_CU0|\set|0x1f|\clr 39 xor t0, 0x1f|\clr 40 mtc0 t0, CP0_STATUS 41 .set noreorder 42 sll zero,3 # ehb 43 .set pop 44 .endm 45 46 .macro setup_c0_status_pri 47#ifdef CONFIG_64BIT 48 setup_c0_status ST0_KX 0 49#else 50 setup_c0_status 0 0 51#endif 52 .endm 53 54 .macro setup_c0_status_sec 55#ifdef CONFIG_64BIT 56 setup_c0_status ST0_KX ST0_BEV 57#else 58 setup_c0_status 0 ST0_BEV 59#endif 60 .endm 61 62#ifndef CONFIG_NO_EXCEPT_FILL 63 /* 64 * Reserved space for exception handlers. 65 * Necessary for machines which link their kernels at KSEG0. 66 */ 67 .fill 0x400 68#endif 69 70EXPORT(_stext) 71 72#ifdef CONFIG_BOOT_RAW 73 /* 74 * Give us a fighting chance of running if execution beings at the 75 * kernel load address. This is needed because this platform does 76 * not have a ELF loader yet. 77 */ 78FEXPORT(__kernel_entry) 79 j kernel_entry 80#endif /* CONFIG_BOOT_RAW */ 81 82 __REF 83 84NESTED(kernel_entry, 16, sp) # kernel entry point 85 86 kernel_entry_setup # cpu specific setup 87 88 setup_c0_status_pri 89 90 /* We might not get launched at the address the kernel is linked to, 91 so we jump there. */ 92 PTR_LA t0, 0f 93 jr t0 940: 95 96#ifdef CONFIG_USE_OF 97#if defined(CONFIG_MIPS_RAW_APPENDED_DTB) || \ 98 defined(CONFIG_MIPS_ELF_APPENDED_DTB) 99 100 PTR_LA t2, __appended_dtb 101 102#ifdef CONFIG_CPU_BIG_ENDIAN 103 li t1, 0xd00dfeed 104#else /* !CONFIG_CPU_BIG_ENDIAN */ 105 li t1, 0xedfe0dd0 106#endif /* !CONFIG_CPU_BIG_ENDIAN */ 107 lw t0, (t2) 108 beq t0, t1, dtb_found 109#endif /* CONFIG_MIPS_RAW_APPENDED_DTB || CONFIG_MIPS_ELF_APPENDED_DTB */ 110 li t1, -2 111 move t2, a1 112 beq a0, t1, dtb_found 113 114 li t2, 0 115dtb_found: 116#endif /* CONFIG_USE_OF */ 117 PTR_LA t0, __bss_start # clear .bss 118 LONG_S zero, (t0) 119 PTR_LA t1, __bss_stop - LONGSIZE 1201: 121 PTR_ADDIU t0, LONGSIZE 122 LONG_S zero, (t0) 123 bne t0, t1, 1b 124 125 LONG_S a0, fw_arg0 # firmware arguments 126 LONG_S a1, fw_arg1 127 LONG_S a2, fw_arg2 128 LONG_S a3, fw_arg3 129 130#ifdef CONFIG_USE_OF 131 LONG_S t2, fw_passed_dtb 132#endif 133 134 MTC0 zero, CP0_CONTEXT # clear context register 135#ifdef CONFIG_64BIT 136 MTC0 zero, CP0_XCONTEXT 137#endif 138 PTR_LA $28, init_thread_union 139 /* Set the SP after an empty pt_regs. */ 140 PTR_LI sp, _THREAD_SIZE - 32 - PT_SIZE 141 PTR_ADDU sp, $28 142 back_to_back_c0_hazard 143 set_saved_sp sp, t0, t1 144 PTR_SUBU sp, 4 * SZREG # init stack pointer 145 146#ifdef CONFIG_RELOCATABLE 147 /* Copy kernel and apply the relocations */ 148 jal relocate_kernel 149 150 /* Repoint the sp into the new kernel image */ 151 PTR_LI sp, _THREAD_SIZE - 32 - PT_SIZE 152 PTR_ADDU sp, $28 153 set_saved_sp sp, t0, t1 154 PTR_SUBU sp, 4 * SZREG # init stack pointer 155 156 /* 157 * relocate_kernel returns the entry point either 158 * in the relocated kernel or the original if for 159 * some reason relocation failed - jump there now 160 * with instruction hazard barrier because of the 161 * newly sync'd icache. 162 */ 163 jr.hb v0 164#else /* !CONFIG_RELOCATABLE */ 165 j start_kernel 166#endif /* !CONFIG_RELOCATABLE */ 167 END(kernel_entry) 168 169#ifdef CONFIG_SMP 170/* 171 * SMP slave cpus entry point. Board specific code for bootstrap calls this 172 * function after setting up the stack and gp registers. 173 */ 174NESTED(smp_bootstrap, 16, sp) 175 smp_slave_setup 176 setup_c0_status_sec 177 j start_secondary 178 END(smp_bootstrap) 179#endif /* CONFIG_SMP */ 180