1 /* 2 * Copyright (C) 2014 Imagination Technologies 3 * Author: Paul Burton <paul.burton@imgtec.com> 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License as published by the 7 * Free Software Foundation; either version 2 of the License, or (at your 8 * option) any later version. 9 */ 10 11 #include <linux/elf.h> 12 #include <linux/sched.h> 13 14 #include <asm/cpu-info.h> 15 16 /* Whether to accept legacy-NaN and 2008-NaN user binaries. */ 17 bool mips_use_nan_legacy; 18 bool mips_use_nan_2008; 19 20 /* FPU modes */ 21 enum { 22 FP_FRE, 23 FP_FR0, 24 FP_FR1, 25 }; 26 27 /** 28 * struct mode_req - ABI FPU mode requirements 29 * @single: The program being loaded needs an FPU but it will only issue 30 * single precision instructions meaning that it can execute in 31 * either FR0 or FR1. 32 * @soft: The soft(-float) requirement means that the program being 33 * loaded needs has no FPU dependency at all (i.e. it has no 34 * FPU instructions). 35 * @fr1: The program being loaded depends on FPU being in FR=1 mode. 36 * @frdefault: The program being loaded depends on the default FPU mode. 37 * That is FR0 for O32 and FR1 for N32/N64. 38 * @fre: The program being loaded depends on FPU with FRE=1. This mode is 39 * a bridge which uses FR=1 whilst still being able to maintain 40 * full compatibility with pre-existing code using the O32 FP32 41 * ABI. 42 * 43 * More information about the FP ABIs can be found here: 44 * 45 * https://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking#10.4.1._Basic_mode_set-up 46 * 47 */ 48 49 struct mode_req { 50 bool single; 51 bool soft; 52 bool fr1; 53 bool frdefault; 54 bool fre; 55 }; 56 57 static const struct mode_req fpu_reqs[] = { 58 [MIPS_ABI_FP_ANY] = { true, true, true, true, true }, 59 [MIPS_ABI_FP_DOUBLE] = { false, false, false, true, true }, 60 [MIPS_ABI_FP_SINGLE] = { true, false, false, false, false }, 61 [MIPS_ABI_FP_SOFT] = { false, true, false, false, false }, 62 [MIPS_ABI_FP_OLD_64] = { false, false, false, false, false }, 63 [MIPS_ABI_FP_XX] = { false, false, true, true, true }, 64 [MIPS_ABI_FP_64] = { false, false, true, false, false }, 65 [MIPS_ABI_FP_64A] = { false, false, true, false, true } 66 }; 67 68 /* 69 * Mode requirements when .MIPS.abiflags is not present in the ELF. 70 * Not present means that everything is acceptable except FR1. 71 */ 72 static struct mode_req none_req = { true, true, false, true, true }; 73 74 int arch_elf_pt_proc(void *_ehdr, void *_phdr, struct file *elf, 75 bool is_interp, struct arch_elf_state *state) 76 { 77 union { 78 struct elf32_hdr e32; 79 struct elf64_hdr e64; 80 } *ehdr = _ehdr; 81 struct elf32_phdr *phdr32 = _phdr; 82 struct elf64_phdr *phdr64 = _phdr; 83 struct mips_elf_abiflags_v0 abiflags; 84 bool elf32; 85 u32 flags; 86 int ret; 87 88 elf32 = ehdr->e32.e_ident[EI_CLASS] == ELFCLASS32; 89 flags = elf32 ? ehdr->e32.e_flags : ehdr->e64.e_flags; 90 91 /* Lets see if this is an O32 ELF */ 92 if (elf32) { 93 if (flags & EF_MIPS_FP64) { 94 /* 95 * Set MIPS_ABI_FP_OLD_64 for EF_MIPS_FP64. We will override it 96 * later if needed 97 */ 98 if (is_interp) 99 state->interp_fp_abi = MIPS_ABI_FP_OLD_64; 100 else 101 state->fp_abi = MIPS_ABI_FP_OLD_64; 102 } 103 if (phdr32->p_type != PT_MIPS_ABIFLAGS) 104 return 0; 105 106 if (phdr32->p_filesz < sizeof(abiflags)) 107 return -EINVAL; 108 109 ret = kernel_read(elf, phdr32->p_offset, 110 (char *)&abiflags, 111 sizeof(abiflags)); 112 } else { 113 if (phdr64->p_type != PT_MIPS_ABIFLAGS) 114 return 0; 115 if (phdr64->p_filesz < sizeof(abiflags)) 116 return -EINVAL; 117 118 ret = kernel_read(elf, phdr64->p_offset, 119 (char *)&abiflags, 120 sizeof(abiflags)); 121 } 122 123 if (ret < 0) 124 return ret; 125 if (ret != sizeof(abiflags)) 126 return -EIO; 127 128 /* Record the required FP ABIs for use by mips_check_elf */ 129 if (is_interp) 130 state->interp_fp_abi = abiflags.fp_abi; 131 else 132 state->fp_abi = abiflags.fp_abi; 133 134 return 0; 135 } 136 137 int arch_check_elf(void *_ehdr, bool has_interpreter, void *_interp_ehdr, 138 struct arch_elf_state *state) 139 { 140 union { 141 struct elf32_hdr e32; 142 struct elf64_hdr e64; 143 } *ehdr = _ehdr; 144 union { 145 struct elf32_hdr e32; 146 struct elf64_hdr e64; 147 } *iehdr = _interp_ehdr; 148 struct mode_req prog_req, interp_req; 149 int fp_abi, interp_fp_abi, abi0, abi1, max_abi; 150 bool elf32; 151 u32 flags; 152 153 elf32 = ehdr->e32.e_ident[EI_CLASS] == ELFCLASS32; 154 flags = elf32 ? ehdr->e32.e_flags : ehdr->e64.e_flags; 155 156 /* 157 * Determine the NaN personality, reject the binary if not allowed. 158 * Also ensure that any interpreter matches the executable. 159 */ 160 if (flags & EF_MIPS_NAN2008) { 161 if (mips_use_nan_2008) 162 state->nan_2008 = 1; 163 else 164 return -ENOEXEC; 165 } else { 166 if (mips_use_nan_legacy) 167 state->nan_2008 = 0; 168 else 169 return -ENOEXEC; 170 } 171 if (has_interpreter) { 172 bool ielf32; 173 u32 iflags; 174 175 ielf32 = iehdr->e32.e_ident[EI_CLASS] == ELFCLASS32; 176 iflags = ielf32 ? iehdr->e32.e_flags : iehdr->e64.e_flags; 177 178 if ((flags ^ iflags) & EF_MIPS_NAN2008) 179 return -ELIBBAD; 180 } 181 182 if (!config_enabled(CONFIG_MIPS_O32_FP64_SUPPORT)) 183 return 0; 184 185 fp_abi = state->fp_abi; 186 187 if (has_interpreter) { 188 interp_fp_abi = state->interp_fp_abi; 189 190 abi0 = min(fp_abi, interp_fp_abi); 191 abi1 = max(fp_abi, interp_fp_abi); 192 } else { 193 abi0 = abi1 = fp_abi; 194 } 195 196 if (elf32 && !(flags & EF_MIPS_ABI2)) { 197 /* Default to a mode capable of running code expecting FR=0 */ 198 state->overall_fp_mode = cpu_has_mips_r6 ? FP_FRE : FP_FR0; 199 200 /* Allow all ABIs we know about */ 201 max_abi = MIPS_ABI_FP_64A; 202 } else { 203 /* MIPS64 code always uses FR=1, thus the default is easy */ 204 state->overall_fp_mode = FP_FR1; 205 206 /* Disallow access to the various FPXX & FP64 ABIs */ 207 max_abi = MIPS_ABI_FP_SOFT; 208 } 209 210 if ((abi0 > max_abi && abi0 != MIPS_ABI_FP_UNKNOWN) || 211 (abi1 > max_abi && abi1 != MIPS_ABI_FP_UNKNOWN)) 212 return -ELIBBAD; 213 214 /* It's time to determine the FPU mode requirements */ 215 prog_req = (abi0 == MIPS_ABI_FP_UNKNOWN) ? none_req : fpu_reqs[abi0]; 216 interp_req = (abi1 == MIPS_ABI_FP_UNKNOWN) ? none_req : fpu_reqs[abi1]; 217 218 /* 219 * Check whether the program's and interp's ABIs have a matching FPU 220 * mode requirement. 221 */ 222 prog_req.single = interp_req.single && prog_req.single; 223 prog_req.soft = interp_req.soft && prog_req.soft; 224 prog_req.fr1 = interp_req.fr1 && prog_req.fr1; 225 prog_req.frdefault = interp_req.frdefault && prog_req.frdefault; 226 prog_req.fre = interp_req.fre && prog_req.fre; 227 228 /* 229 * Determine the desired FPU mode 230 * 231 * Decision making: 232 * 233 * - We want FR_FRE if FRE=1 and both FR=1 and FR=0 are false. This 234 * means that we have a combination of program and interpreter 235 * that inherently require the hybrid FP mode. 236 * - If FR1 and FRDEFAULT is true, that means we hit the any-abi or 237 * fpxx case. This is because, in any-ABI (or no-ABI) we have no FPU 238 * instructions so we don't care about the mode. We will simply use 239 * the one preferred by the hardware. In fpxx case, that ABI can 240 * handle both FR=1 and FR=0, so, again, we simply choose the one 241 * preferred by the hardware. Next, if we only use single-precision 242 * FPU instructions, and the default ABI FPU mode is not good 243 * (ie single + any ABI combination), we set again the FPU mode to the 244 * one is preferred by the hardware. Next, if we know that the code 245 * will only use single-precision instructions, shown by single being 246 * true but frdefault being false, then we again set the FPU mode to 247 * the one that is preferred by the hardware. 248 * - We want FP_FR1 if that's the only matching mode and the default one 249 * is not good. 250 * - Return with -ELIBADD if we can't find a matching FPU mode. 251 */ 252 if (prog_req.fre && !prog_req.frdefault && !prog_req.fr1) 253 state->overall_fp_mode = FP_FRE; 254 else if ((prog_req.fr1 && prog_req.frdefault) || 255 (prog_req.single && !prog_req.frdefault)) 256 /* Make sure 64-bit MIPS III/IV/64R1 will not pick FR1 */ 257 state->overall_fp_mode = ((current_cpu_data.fpu_id & MIPS_FPIR_F64) && 258 cpu_has_mips_r2_r6) ? 259 FP_FR1 : FP_FR0; 260 else if (prog_req.fr1) 261 state->overall_fp_mode = FP_FR1; 262 else if (!prog_req.fre && !prog_req.frdefault && 263 !prog_req.fr1 && !prog_req.single && !prog_req.soft) 264 return -ELIBBAD; 265 266 return 0; 267 } 268 269 static inline void set_thread_fp_mode(int hybrid, int regs32) 270 { 271 if (hybrid) 272 set_thread_flag(TIF_HYBRID_FPREGS); 273 else 274 clear_thread_flag(TIF_HYBRID_FPREGS); 275 if (regs32) 276 set_thread_flag(TIF_32BIT_FPREGS); 277 else 278 clear_thread_flag(TIF_32BIT_FPREGS); 279 } 280 281 void mips_set_personality_fp(struct arch_elf_state *state) 282 { 283 /* 284 * This function is only ever called for O32 ELFs so we should 285 * not be worried about N32/N64 binaries. 286 */ 287 288 if (!config_enabled(CONFIG_MIPS_O32_FP64_SUPPORT)) 289 return; 290 291 switch (state->overall_fp_mode) { 292 case FP_FRE: 293 set_thread_fp_mode(1, 0); 294 break; 295 case FP_FR0: 296 set_thread_fp_mode(0, 1); 297 break; 298 case FP_FR1: 299 set_thread_fp_mode(0, 0); 300 break; 301 default: 302 BUG(); 303 } 304 } 305 306 /* 307 * Select the IEEE 754 NaN encoding and ABS.fmt/NEG.fmt execution mode 308 * in FCSR according to the ELF NaN personality. 309 */ 310 void mips_set_personality_nan(struct arch_elf_state *state) 311 { 312 struct cpuinfo_mips *c = &boot_cpu_data; 313 struct task_struct *t = current; 314 315 t->thread.fpu.fcr31 = c->fpu_csr31; 316 switch (state->nan_2008) { 317 case 0: 318 break; 319 case 1: 320 if (!(c->fpu_msk31 & FPU_CSR_NAN2008)) 321 t->thread.fpu.fcr31 |= FPU_CSR_NAN2008; 322 if (!(c->fpu_msk31 & FPU_CSR_ABS2008)) 323 t->thread.fpu.fcr31 |= FPU_CSR_ABS2008; 324 break; 325 default: 326 BUG(); 327 } 328 } 329