1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2014 Imagination Technologies 4 * Author: Paul Burton <paul.burton@mips.com> 5 */ 6 7 #include <linux/binfmts.h> 8 #include <linux/elf.h> 9 #include <linux/export.h> 10 #include <linux/sched.h> 11 12 #include <asm/cpu-features.h> 13 #include <asm/cpu-info.h> 14 15 #ifdef CONFIG_MIPS_FP_SUPPORT 16 17 /* Whether to accept legacy-NaN and 2008-NaN user binaries. */ 18 bool mips_use_nan_legacy; 19 bool mips_use_nan_2008; 20 21 /* FPU modes */ 22 enum { 23 FP_FRE, 24 FP_FR0, 25 FP_FR1, 26 }; 27 28 /** 29 * struct mode_req - ABI FPU mode requirements 30 * @single: The program being loaded needs an FPU but it will only issue 31 * single precision instructions meaning that it can execute in 32 * either FR0 or FR1. 33 * @soft: The soft(-float) requirement means that the program being 34 * loaded needs has no FPU dependency at all (i.e. it has no 35 * FPU instructions). 36 * @fr1: The program being loaded depends on FPU being in FR=1 mode. 37 * @frdefault: The program being loaded depends on the default FPU mode. 38 * That is FR0 for O32 and FR1 for N32/N64. 39 * @fre: The program being loaded depends on FPU with FRE=1. This mode is 40 * a bridge which uses FR=1 whilst still being able to maintain 41 * full compatibility with pre-existing code using the O32 FP32 42 * ABI. 43 * 44 * More information about the FP ABIs can be found here: 45 * 46 * https://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking#10.4.1._Basic_mode_set-up 47 * 48 */ 49 50 struct mode_req { 51 bool single; 52 bool soft; 53 bool fr1; 54 bool frdefault; 55 bool fre; 56 }; 57 58 static const struct mode_req fpu_reqs[] = { 59 [MIPS_ABI_FP_ANY] = { true, true, true, true, true }, 60 [MIPS_ABI_FP_DOUBLE] = { false, false, false, true, true }, 61 [MIPS_ABI_FP_SINGLE] = { true, false, false, false, false }, 62 [MIPS_ABI_FP_SOFT] = { false, true, false, false, false }, 63 [MIPS_ABI_FP_OLD_64] = { false, false, false, false, false }, 64 [MIPS_ABI_FP_XX] = { false, false, true, true, true }, 65 [MIPS_ABI_FP_64] = { false, false, true, false, false }, 66 [MIPS_ABI_FP_64A] = { false, false, true, false, true } 67 }; 68 69 /* 70 * Mode requirements when .MIPS.abiflags is not present in the ELF. 71 * Not present means that everything is acceptable except FR1. 72 */ 73 static struct mode_req none_req = { true, true, false, true, true }; 74 75 int arch_elf_pt_proc(void *_ehdr, void *_phdr, struct file *elf, 76 bool is_interp, struct arch_elf_state *state) 77 { 78 union { 79 struct elf32_hdr e32; 80 struct elf64_hdr e64; 81 } *ehdr = _ehdr; 82 struct elf32_phdr *phdr32 = _phdr; 83 struct elf64_phdr *phdr64 = _phdr; 84 struct mips_elf_abiflags_v0 abiflags; 85 bool elf32; 86 u32 flags; 87 int ret; 88 loff_t pos; 89 90 elf32 = ehdr->e32.e_ident[EI_CLASS] == ELFCLASS32; 91 flags = elf32 ? ehdr->e32.e_flags : ehdr->e64.e_flags; 92 93 /* Let's see if this is an O32 ELF */ 94 if (elf32) { 95 if (flags & EF_MIPS_FP64) { 96 /* 97 * Set MIPS_ABI_FP_OLD_64 for EF_MIPS_FP64. We will override it 98 * later if needed 99 */ 100 if (is_interp) 101 state->interp_fp_abi = MIPS_ABI_FP_OLD_64; 102 else 103 state->fp_abi = MIPS_ABI_FP_OLD_64; 104 } 105 if (phdr32->p_type != PT_MIPS_ABIFLAGS) 106 return 0; 107 108 if (phdr32->p_filesz < sizeof(abiflags)) 109 return -EINVAL; 110 pos = phdr32->p_offset; 111 } else { 112 if (phdr64->p_type != PT_MIPS_ABIFLAGS) 113 return 0; 114 if (phdr64->p_filesz < sizeof(abiflags)) 115 return -EINVAL; 116 pos = phdr64->p_offset; 117 } 118 119 ret = kernel_read(elf, &abiflags, sizeof(abiflags), &pos); 120 if (ret < 0) 121 return ret; 122 if (ret != sizeof(abiflags)) 123 return -EIO; 124 125 /* Record the required FP ABIs for use by mips_check_elf */ 126 if (is_interp) 127 state->interp_fp_abi = abiflags.fp_abi; 128 else 129 state->fp_abi = abiflags.fp_abi; 130 131 return 0; 132 } 133 134 int arch_check_elf(void *_ehdr, bool has_interpreter, void *_interp_ehdr, 135 struct arch_elf_state *state) 136 { 137 union { 138 struct elf32_hdr e32; 139 struct elf64_hdr e64; 140 } *ehdr = _ehdr; 141 union { 142 struct elf32_hdr e32; 143 struct elf64_hdr e64; 144 } *iehdr = _interp_ehdr; 145 struct mode_req prog_req, interp_req; 146 int fp_abi, interp_fp_abi, abi0, abi1, max_abi; 147 bool elf32; 148 u32 flags; 149 150 elf32 = ehdr->e32.e_ident[EI_CLASS] == ELFCLASS32; 151 flags = elf32 ? ehdr->e32.e_flags : ehdr->e64.e_flags; 152 153 /* 154 * Determine the NaN personality, reject the binary if not allowed. 155 * Also ensure that any interpreter matches the executable. 156 */ 157 if (flags & EF_MIPS_NAN2008) { 158 if (mips_use_nan_2008) 159 state->nan_2008 = 1; 160 else 161 return -ENOEXEC; 162 } else { 163 if (mips_use_nan_legacy) 164 state->nan_2008 = 0; 165 else 166 return -ENOEXEC; 167 } 168 if (has_interpreter) { 169 bool ielf32; 170 u32 iflags; 171 172 ielf32 = iehdr->e32.e_ident[EI_CLASS] == ELFCLASS32; 173 iflags = ielf32 ? iehdr->e32.e_flags : iehdr->e64.e_flags; 174 175 if ((flags ^ iflags) & EF_MIPS_NAN2008) 176 return -ELIBBAD; 177 } 178 179 if (!IS_ENABLED(CONFIG_MIPS_O32_FP64_SUPPORT)) 180 return 0; 181 182 fp_abi = state->fp_abi; 183 184 if (has_interpreter) { 185 interp_fp_abi = state->interp_fp_abi; 186 187 abi0 = min(fp_abi, interp_fp_abi); 188 abi1 = max(fp_abi, interp_fp_abi); 189 } else { 190 abi0 = abi1 = fp_abi; 191 } 192 193 if (elf32 && !(flags & EF_MIPS_ABI2)) { 194 /* Default to a mode capable of running code expecting FR=0 */ 195 state->overall_fp_mode = cpu_has_mips_r6 ? FP_FRE : FP_FR0; 196 197 /* Allow all ABIs we know about */ 198 max_abi = MIPS_ABI_FP_64A; 199 } else { 200 /* MIPS64 code always uses FR=1, thus the default is easy */ 201 state->overall_fp_mode = FP_FR1; 202 203 /* Disallow access to the various FPXX & FP64 ABIs */ 204 max_abi = MIPS_ABI_FP_SOFT; 205 } 206 207 if ((abi0 > max_abi && abi0 != MIPS_ABI_FP_UNKNOWN) || 208 (abi1 > max_abi && abi1 != MIPS_ABI_FP_UNKNOWN)) 209 return -ELIBBAD; 210 211 /* It's time to determine the FPU mode requirements */ 212 prog_req = (abi0 == MIPS_ABI_FP_UNKNOWN) ? none_req : fpu_reqs[abi0]; 213 interp_req = (abi1 == MIPS_ABI_FP_UNKNOWN) ? none_req : fpu_reqs[abi1]; 214 215 /* 216 * Check whether the program's and interp's ABIs have a matching FPU 217 * mode requirement. 218 */ 219 prog_req.single = interp_req.single && prog_req.single; 220 prog_req.soft = interp_req.soft && prog_req.soft; 221 prog_req.fr1 = interp_req.fr1 && prog_req.fr1; 222 prog_req.frdefault = interp_req.frdefault && prog_req.frdefault; 223 prog_req.fre = interp_req.fre && prog_req.fre; 224 225 /* 226 * Determine the desired FPU mode 227 * 228 * Decision making: 229 * 230 * - We want FR_FRE if FRE=1 and both FR=1 and FR=0 are false. This 231 * means that we have a combination of program and interpreter 232 * that inherently require the hybrid FP mode. 233 * - If FR1 and FRDEFAULT is true, that means we hit the any-abi or 234 * fpxx case. This is because, in any-ABI (or no-ABI) we have no FPU 235 * instructions so we don't care about the mode. We will simply use 236 * the one preferred by the hardware. In fpxx case, that ABI can 237 * handle both FR=1 and FR=0, so, again, we simply choose the one 238 * preferred by the hardware. Next, if we only use single-precision 239 * FPU instructions, and the default ABI FPU mode is not good 240 * (ie single + any ABI combination), we set again the FPU mode to the 241 * one is preferred by the hardware. Next, if we know that the code 242 * will only use single-precision instructions, shown by single being 243 * true but frdefault being false, then we again set the FPU mode to 244 * the one that is preferred by the hardware. 245 * - We want FP_FR1 if that's the only matching mode and the default one 246 * is not good. 247 * - Return with -ELIBADD if we can't find a matching FPU mode. 248 */ 249 if (prog_req.fre && !prog_req.frdefault && !prog_req.fr1) 250 state->overall_fp_mode = FP_FRE; 251 else if ((prog_req.fr1 && prog_req.frdefault) || 252 (prog_req.single && !prog_req.frdefault)) 253 /* Make sure 64-bit MIPS III/IV/64R1 will not pick FR1 */ 254 state->overall_fp_mode = ((raw_current_cpu_data.fpu_id & MIPS_FPIR_F64) && 255 cpu_has_mips_r2_r6) ? 256 FP_FR1 : FP_FR0; 257 else if (prog_req.fr1) 258 state->overall_fp_mode = FP_FR1; 259 else if (!prog_req.fre && !prog_req.frdefault && 260 !prog_req.fr1 && !prog_req.single && !prog_req.soft) 261 return -ELIBBAD; 262 263 return 0; 264 } 265 266 static inline void set_thread_fp_mode(int hybrid, int regs32) 267 { 268 if (hybrid) 269 set_thread_flag(TIF_HYBRID_FPREGS); 270 else 271 clear_thread_flag(TIF_HYBRID_FPREGS); 272 if (regs32) 273 set_thread_flag(TIF_32BIT_FPREGS); 274 else 275 clear_thread_flag(TIF_32BIT_FPREGS); 276 } 277 278 void mips_set_personality_fp(struct arch_elf_state *state) 279 { 280 /* 281 * This function is only ever called for O32 ELFs so we should 282 * not be worried about N32/N64 binaries. 283 */ 284 285 if (!IS_ENABLED(CONFIG_MIPS_O32_FP64_SUPPORT)) 286 return; 287 288 switch (state->overall_fp_mode) { 289 case FP_FRE: 290 set_thread_fp_mode(1, 0); 291 break; 292 case FP_FR0: 293 set_thread_fp_mode(0, 1); 294 break; 295 case FP_FR1: 296 set_thread_fp_mode(0, 0); 297 break; 298 default: 299 BUG(); 300 } 301 } 302 303 /* 304 * Select the IEEE 754 NaN encoding and ABS.fmt/NEG.fmt execution mode 305 * in FCSR according to the ELF NaN personality. 306 */ 307 void mips_set_personality_nan(struct arch_elf_state *state) 308 { 309 struct cpuinfo_mips *c = &boot_cpu_data; 310 struct task_struct *t = current; 311 312 t->thread.fpu.fcr31 = c->fpu_csr31; 313 switch (state->nan_2008) { 314 case 0: 315 break; 316 case 1: 317 if (!(c->fpu_msk31 & FPU_CSR_NAN2008)) 318 t->thread.fpu.fcr31 |= FPU_CSR_NAN2008; 319 if (!(c->fpu_msk31 & FPU_CSR_ABS2008)) 320 t->thread.fpu.fcr31 |= FPU_CSR_ABS2008; 321 break; 322 default: 323 BUG(); 324 } 325 } 326 327 #endif /* CONFIG_MIPS_FP_SUPPORT */ 328 329 int mips_elf_read_implies_exec(void *elf_ex, int exstack) 330 { 331 if (exstack != EXSTACK_DISABLE_X) { 332 /* The binary doesn't request a non-executable stack */ 333 return 1; 334 } 335 336 if (!cpu_has_rixi) { 337 /* The CPU doesn't support non-executable memory */ 338 return 1; 339 } 340 341 return 0; 342 } 343 EXPORT_SYMBOL(mips_elf_read_implies_exec); 344