1 /* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1992 Linus Torvalds 7 * Copyright (C) 1994 - 2001, 2003, 07 Ralf Baechle 8 */ 9 #include <linux/clockchips.h> 10 #include <linux/init.h> 11 #include <linux/interrupt.h> 12 #include <linux/kernel.h> 13 #include <linux/smp.h> 14 #include <linux/spinlock.h> 15 #include <linux/irq.h> 16 17 #include <asm/irq_cpu.h> 18 #include <asm/i8253.h> 19 #include <asm/i8259.h> 20 #include <asm/io.h> 21 #include <asm/jazz.h> 22 #include <asm/pgtable.h> 23 24 static DEFINE_RAW_SPINLOCK(r4030_lock); 25 26 static void enable_r4030_irq(unsigned int irq) 27 { 28 unsigned int mask = 1 << (irq - JAZZ_IRQ_START); 29 unsigned long flags; 30 31 raw_spin_lock_irqsave(&r4030_lock, flags); 32 mask |= r4030_read_reg16(JAZZ_IO_IRQ_ENABLE); 33 r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, mask); 34 raw_spin_unlock_irqrestore(&r4030_lock, flags); 35 } 36 37 void disable_r4030_irq(unsigned int irq) 38 { 39 unsigned int mask = ~(1 << (irq - JAZZ_IRQ_START)); 40 unsigned long flags; 41 42 raw_spin_lock_irqsave(&r4030_lock, flags); 43 mask &= r4030_read_reg16(JAZZ_IO_IRQ_ENABLE); 44 r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, mask); 45 raw_spin_unlock_irqrestore(&r4030_lock, flags); 46 } 47 48 static struct irq_chip r4030_irq_type = { 49 .name = "R4030", 50 .ack = disable_r4030_irq, 51 .mask = disable_r4030_irq, 52 .mask_ack = disable_r4030_irq, 53 .unmask = enable_r4030_irq, 54 }; 55 56 void __init init_r4030_ints(void) 57 { 58 int i; 59 60 for (i = JAZZ_IRQ_START; i <= JAZZ_IRQ_END; i++) 61 set_irq_chip_and_handler(i, &r4030_irq_type, handle_level_irq); 62 63 r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, 0); 64 r4030_read_reg16(JAZZ_IO_IRQ_SOURCE); /* clear pending IRQs */ 65 r4030_read_reg32(JAZZ_R4030_INVAL_ADDR); /* clear error bits */ 66 } 67 68 /* 69 * On systems with i8259-style interrupt controllers we assume for 70 * driver compatibility reasons interrupts 0 - 15 to be the i8259 71 * interrupts even if the hardware uses a different interrupt numbering. 72 */ 73 void __init arch_init_irq(void) 74 { 75 /* 76 * this is a hack to get back the still needed wired mapping 77 * killed by init_mm() 78 */ 79 80 /* Map 0xe0000000 -> 0x0:800005C0, 0xe0010000 -> 0x1:30000580 */ 81 add_wired_entry(0x02000017, 0x03c00017, 0xe0000000, PM_64K); 82 /* Map 0xe2000000 -> 0x0:900005C0, 0xe3010000 -> 0x0:910005C0 */ 83 add_wired_entry(0x02400017, 0x02440017, 0xe2000000, PM_16M); 84 /* Map 0xe4000000 -> 0x0:600005C0, 0xe4100000 -> 400005C0 */ 85 add_wired_entry(0x01800017, 0x01000017, 0xe4000000, PM_4M); 86 87 init_i8259_irqs(); /* Integrated i8259 */ 88 mips_cpu_irq_init(); 89 init_r4030_ints(); 90 91 change_c0_status(ST0_IM, IE_IRQ2 | IE_IRQ1); 92 } 93 94 asmlinkage void plat_irq_dispatch(void) 95 { 96 unsigned int pending = read_c0_cause() & read_c0_status(); 97 unsigned int irq; 98 99 if (pending & IE_IRQ4) { 100 r4030_read_reg32(JAZZ_TIMER_REGISTER); 101 do_IRQ(JAZZ_TIMER_IRQ); 102 } else if (pending & IE_IRQ2) { 103 irq = *(volatile u8 *)JAZZ_EISA_IRQ_ACK; 104 do_IRQ(irq); 105 } else if (pending & IE_IRQ1) { 106 irq = *(volatile u8 *)JAZZ_IO_IRQ_SOURCE >> 2; 107 if (likely(irq > 0)) 108 do_IRQ(irq + JAZZ_IRQ_START - 1); 109 else 110 panic("Unimplemented loc_no_irq handler"); 111 } 112 } 113 114 static void r4030_set_mode(enum clock_event_mode mode, 115 struct clock_event_device *evt) 116 { 117 /* Nothing to do ... */ 118 } 119 120 struct clock_event_device r4030_clockevent = { 121 .name = "r4030", 122 .features = CLOCK_EVT_FEAT_PERIODIC, 123 .rating = 300, 124 .irq = JAZZ_TIMER_IRQ, 125 .set_mode = r4030_set_mode, 126 }; 127 128 static irqreturn_t r4030_timer_interrupt(int irq, void *dev_id) 129 { 130 struct clock_event_device *cd = dev_id; 131 132 cd->event_handler(cd); 133 return IRQ_HANDLED; 134 } 135 136 static struct irqaction r4030_timer_irqaction = { 137 .handler = r4030_timer_interrupt, 138 .flags = IRQF_DISABLED | IRQF_TIMER, 139 .name = "R4030 timer", 140 }; 141 142 void __init plat_time_init(void) 143 { 144 struct clock_event_device *cd = &r4030_clockevent; 145 struct irqaction *action = &r4030_timer_irqaction; 146 unsigned int cpu = smp_processor_id(); 147 148 BUG_ON(HZ != 100); 149 150 cd->cpumask = cpumask_of(cpu); 151 clockevents_register_device(cd); 152 action->dev_id = cd; 153 setup_irq(JAZZ_TIMER_IRQ, action); 154 155 /* 156 * Set clock to 100Hz. 157 * 158 * The R4030 timer receives an input clock of 1kHz which is divieded by 159 * a programmable 4-bit divider. This makes it fairly inflexible. 160 */ 161 r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9); 162 setup_pit_timer(); 163 } 164