xref: /openbmc/linux/arch/mips/include/uapi/asm/reg.h (revision 4f6cce39)
1 /*
2  * Various register offset definitions for debuggers, core file
3  * examiners and whatnot.
4  *
5  * This file is subject to the terms and conditions of the GNU General Public
6  * License.  See the file "COPYING" in the main directory of this archive
7  * for more details.
8  *
9  * Copyright (C) 1995, 1999 Ralf Baechle
10  * Copyright (C) 1995, 1999 Silicon Graphics
11  */
12 #ifndef __UAPI_ASM_MIPS_REG_H
13 #define __UAPI_ASM_MIPS_REG_H
14 
15 #define MIPS32_EF_R0		6
16 #define MIPS32_EF_R1		7
17 #define MIPS32_EF_R2		8
18 #define MIPS32_EF_R3		9
19 #define MIPS32_EF_R4		10
20 #define MIPS32_EF_R5		11
21 #define MIPS32_EF_R6		12
22 #define MIPS32_EF_R7		13
23 #define MIPS32_EF_R8		14
24 #define MIPS32_EF_R9		15
25 #define MIPS32_EF_R10		16
26 #define MIPS32_EF_R11		17
27 #define MIPS32_EF_R12		18
28 #define MIPS32_EF_R13		19
29 #define MIPS32_EF_R14		20
30 #define MIPS32_EF_R15		21
31 #define MIPS32_EF_R16		22
32 #define MIPS32_EF_R17		23
33 #define MIPS32_EF_R18		24
34 #define MIPS32_EF_R19		25
35 #define MIPS32_EF_R20		26
36 #define MIPS32_EF_R21		27
37 #define MIPS32_EF_R22		28
38 #define MIPS32_EF_R23		29
39 #define MIPS32_EF_R24		30
40 #define MIPS32_EF_R25		31
41 
42 /*
43  * k0/k1 unsaved
44  */
45 #define MIPS32_EF_R26		32
46 #define MIPS32_EF_R27		33
47 
48 #define MIPS32_EF_R28		34
49 #define MIPS32_EF_R29		35
50 #define MIPS32_EF_R30		36
51 #define MIPS32_EF_R31		37
52 
53 /*
54  * Saved special registers
55  */
56 #define MIPS32_EF_LO		38
57 #define MIPS32_EF_HI		39
58 
59 #define MIPS32_EF_CP0_EPC	40
60 #define MIPS32_EF_CP0_BADVADDR	41
61 #define MIPS32_EF_CP0_STATUS	42
62 #define MIPS32_EF_CP0_CAUSE	43
63 #define MIPS32_EF_UNUSED0	44
64 
65 #define MIPS32_EF_SIZE		180
66 
67 #define MIPS64_EF_R0		0
68 #define MIPS64_EF_R1		1
69 #define MIPS64_EF_R2		2
70 #define MIPS64_EF_R3		3
71 #define MIPS64_EF_R4		4
72 #define MIPS64_EF_R5		5
73 #define MIPS64_EF_R6		6
74 #define MIPS64_EF_R7		7
75 #define MIPS64_EF_R8		8
76 #define MIPS64_EF_R9		9
77 #define MIPS64_EF_R10		10
78 #define MIPS64_EF_R11		11
79 #define MIPS64_EF_R12		12
80 #define MIPS64_EF_R13		13
81 #define MIPS64_EF_R14		14
82 #define MIPS64_EF_R15		15
83 #define MIPS64_EF_R16		16
84 #define MIPS64_EF_R17		17
85 #define MIPS64_EF_R18		18
86 #define MIPS64_EF_R19		19
87 #define MIPS64_EF_R20		20
88 #define MIPS64_EF_R21		21
89 #define MIPS64_EF_R22		22
90 #define MIPS64_EF_R23		23
91 #define MIPS64_EF_R24		24
92 #define MIPS64_EF_R25		25
93 
94 /*
95  * k0/k1 unsaved
96  */
97 #define MIPS64_EF_R26		26
98 #define MIPS64_EF_R27		27
99 
100 
101 #define MIPS64_EF_R28		28
102 #define MIPS64_EF_R29		29
103 #define MIPS64_EF_R30		30
104 #define MIPS64_EF_R31		31
105 
106 /*
107  * Saved special registers
108  */
109 #define MIPS64_EF_LO		32
110 #define MIPS64_EF_HI		33
111 
112 #define MIPS64_EF_CP0_EPC	34
113 #define MIPS64_EF_CP0_BADVADDR	35
114 #define MIPS64_EF_CP0_STATUS	36
115 #define MIPS64_EF_CP0_CAUSE	37
116 
117 #define MIPS64_EF_SIZE		304	/* size in bytes */
118 
119 #if _MIPS_SIM == _MIPS_SIM_ABI32
120 
121 #define EF_R0			MIPS32_EF_R0
122 #define EF_R1			MIPS32_EF_R1
123 #define EF_R2			MIPS32_EF_R2
124 #define EF_R3			MIPS32_EF_R3
125 #define EF_R4			MIPS32_EF_R4
126 #define EF_R5			MIPS32_EF_R5
127 #define EF_R6			MIPS32_EF_R6
128 #define EF_R7			MIPS32_EF_R7
129 #define EF_R8			MIPS32_EF_R8
130 #define EF_R9			MIPS32_EF_R9
131 #define EF_R10			MIPS32_EF_R10
132 #define EF_R11			MIPS32_EF_R11
133 #define EF_R12			MIPS32_EF_R12
134 #define EF_R13			MIPS32_EF_R13
135 #define EF_R14			MIPS32_EF_R14
136 #define EF_R15			MIPS32_EF_R15
137 #define EF_R16			MIPS32_EF_R16
138 #define EF_R17			MIPS32_EF_R17
139 #define EF_R18			MIPS32_EF_R18
140 #define EF_R19			MIPS32_EF_R19
141 #define EF_R20			MIPS32_EF_R20
142 #define EF_R21			MIPS32_EF_R21
143 #define EF_R22			MIPS32_EF_R22
144 #define EF_R23			MIPS32_EF_R23
145 #define EF_R24			MIPS32_EF_R24
146 #define EF_R25			MIPS32_EF_R25
147 #define EF_R26			MIPS32_EF_R26
148 #define EF_R27			MIPS32_EF_R27
149 #define EF_R28			MIPS32_EF_R28
150 #define EF_R29			MIPS32_EF_R29
151 #define EF_R30			MIPS32_EF_R30
152 #define EF_R31			MIPS32_EF_R31
153 #define EF_LO			MIPS32_EF_LO
154 #define EF_HI			MIPS32_EF_HI
155 #define EF_CP0_EPC		MIPS32_EF_CP0_EPC
156 #define EF_CP0_BADVADDR		MIPS32_EF_CP0_BADVADDR
157 #define EF_CP0_STATUS		MIPS32_EF_CP0_STATUS
158 #define EF_CP0_CAUSE		MIPS32_EF_CP0_CAUSE
159 #define EF_UNUSED0		MIPS32_EF_UNUSED0
160 #define EF_SIZE			MIPS32_EF_SIZE
161 
162 #elif _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32
163 
164 #define EF_R0			MIPS64_EF_R0
165 #define EF_R1			MIPS64_EF_R1
166 #define EF_R2			MIPS64_EF_R2
167 #define EF_R3			MIPS64_EF_R3
168 #define EF_R4			MIPS64_EF_R4
169 #define EF_R5			MIPS64_EF_R5
170 #define EF_R6			MIPS64_EF_R6
171 #define EF_R7			MIPS64_EF_R7
172 #define EF_R8			MIPS64_EF_R8
173 #define EF_R9			MIPS64_EF_R9
174 #define EF_R10			MIPS64_EF_R10
175 #define EF_R11			MIPS64_EF_R11
176 #define EF_R12			MIPS64_EF_R12
177 #define EF_R13			MIPS64_EF_R13
178 #define EF_R14			MIPS64_EF_R14
179 #define EF_R15			MIPS64_EF_R15
180 #define EF_R16			MIPS64_EF_R16
181 #define EF_R17			MIPS64_EF_R17
182 #define EF_R18			MIPS64_EF_R18
183 #define EF_R19			MIPS64_EF_R19
184 #define EF_R20			MIPS64_EF_R20
185 #define EF_R21			MIPS64_EF_R21
186 #define EF_R22			MIPS64_EF_R22
187 #define EF_R23			MIPS64_EF_R23
188 #define EF_R24			MIPS64_EF_R24
189 #define EF_R25			MIPS64_EF_R25
190 #define EF_R26			MIPS64_EF_R26
191 #define EF_R27			MIPS64_EF_R27
192 #define EF_R28			MIPS64_EF_R28
193 #define EF_R29			MIPS64_EF_R29
194 #define EF_R30			MIPS64_EF_R30
195 #define EF_R31			MIPS64_EF_R31
196 #define EF_LO			MIPS64_EF_LO
197 #define EF_HI			MIPS64_EF_HI
198 #define EF_CP0_EPC		MIPS64_EF_CP0_EPC
199 #define EF_CP0_BADVADDR		MIPS64_EF_CP0_BADVADDR
200 #define EF_CP0_STATUS		MIPS64_EF_CP0_STATUS
201 #define EF_CP0_CAUSE		MIPS64_EF_CP0_CAUSE
202 #define EF_SIZE			MIPS64_EF_SIZE
203 
204 #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */
205 
206 #endif /* __UAPI_ASM_MIPS_REG_H */
207