1 /* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 2004, 2005, 2006, 2008 Thiemo Seufer 7 * Copyright (C) 2005 Maciej W. Rozycki 8 * Copyright (C) 2006 Ralf Baechle (ralf@linux-mips.org) 9 * Copyright (C) 2012, 2013 MIPS Technologies, Inc. All rights reserved. 10 */ 11 12 #include <linux/types.h> 13 14 #ifdef CONFIG_EXPORT_UASM 15 #include <linux/export.h> 16 #define UASM_EXPORT_SYMBOL(sym) EXPORT_SYMBOL(sym) 17 #else 18 #define UASM_EXPORT_SYMBOL(sym) 19 #endif 20 21 #define _UASM_ISA_CLASSIC 0 22 #define _UASM_ISA_MICROMIPS 1 23 24 #ifndef UASM_ISA 25 #ifdef CONFIG_CPU_MICROMIPS 26 #define UASM_ISA _UASM_ISA_MICROMIPS 27 #else 28 #define UASM_ISA _UASM_ISA_CLASSIC 29 #endif 30 #endif 31 32 #if (UASM_ISA == _UASM_ISA_CLASSIC) 33 #ifdef CONFIG_CPU_MICROMIPS 34 #define ISAOPC(op) CL_uasm_i##op 35 #define ISAFUNC(x) CL_##x 36 #else 37 #define ISAOPC(op) uasm_i##op 38 #define ISAFUNC(x) x 39 #endif 40 #elif (UASM_ISA == _UASM_ISA_MICROMIPS) 41 #ifdef CONFIG_CPU_MICROMIPS 42 #define ISAOPC(op) uasm_i##op 43 #define ISAFUNC(x) x 44 #else 45 #define ISAOPC(op) MM_uasm_i##op 46 #define ISAFUNC(x) MM_##x 47 #endif 48 #else 49 #error Unsupported micro-assembler ISA!!! 50 #endif 51 52 #define Ip_u1u2u3(op) \ 53 void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c) 54 55 #define Ip_u2u1u3(op) \ 56 void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c) 57 58 #define Ip_u3u2u1(op) \ 59 void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c) 60 61 #define Ip_u3u1u2(op) \ 62 void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c) 63 64 #define Ip_u1u2s3(op) \ 65 void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c) 66 67 #define Ip_u2s3u1(op) \ 68 void ISAOPC(op)(u32 **buf, unsigned int a, signed int b, unsigned int c) 69 70 #define Ip_s3s1s2(op) \ 71 void ISAOPC(op)(u32 **buf, int a, int b, int c) 72 73 #define Ip_u2u1s3(op) \ 74 void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c) 75 76 #define Ip_u2u1msbu3(op) \ 77 void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c, \ 78 unsigned int d) 79 80 #define Ip_u1u2(op) \ 81 void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b) 82 83 #define Ip_u2u1(op) \ 84 void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b) 85 86 #define Ip_u1s2(op) \ 87 void ISAOPC(op)(u32 **buf, unsigned int a, signed int b) 88 89 #define Ip_u1(op) void ISAOPC(op)(u32 **buf, unsigned int a) 90 91 #define Ip_0(op) void ISAOPC(op)(u32 **buf) 92 93 Ip_u2u1s3(_addiu); 94 Ip_u3u1u2(_addu); 95 Ip_u3u1u2(_and); 96 Ip_u2u1u3(_andi); 97 Ip_u1u2s3(_bbit0); 98 Ip_u1u2s3(_bbit1); 99 Ip_u1u2s3(_beq); 100 Ip_u1u2s3(_beql); 101 Ip_u1s2(_bgez); 102 Ip_u1s2(_bgezl); 103 Ip_u1s2(_bltz); 104 Ip_u1s2(_bltzl); 105 Ip_u1u2s3(_bne); 106 Ip_u2s3u1(_cache); 107 Ip_u2u1s3(_daddiu); 108 Ip_u3u1u2(_daddu); 109 Ip_u2u1msbu3(_dins); 110 Ip_u2u1msbu3(_dinsm); 111 Ip_u1u2(_divu); 112 Ip_u1u2u3(_dmfc0); 113 Ip_u1u2u3(_dmtc0); 114 Ip_u2u1u3(_drotr); 115 Ip_u2u1u3(_drotr32); 116 Ip_u2u1u3(_dsll); 117 Ip_u2u1u3(_dsll32); 118 Ip_u2u1u3(_dsra); 119 Ip_u2u1u3(_dsrl); 120 Ip_u2u1u3(_dsrl32); 121 Ip_u3u1u2(_dsubu); 122 Ip_0(_eret); 123 Ip_u2u1msbu3(_ext); 124 Ip_u2u1msbu3(_ins); 125 Ip_u1(_j); 126 Ip_u1(_jal); 127 Ip_u2u1(_jalr); 128 Ip_u1(_jr); 129 Ip_u2s3u1(_lb); 130 Ip_u2s3u1(_ld); 131 Ip_u3u1u2(_ldx); 132 Ip_u2s3u1(_lh); 133 Ip_u2s3u1(_ll); 134 Ip_u2s3u1(_lld); 135 Ip_u1s2(_lui); 136 Ip_u2s3u1(_lw); 137 Ip_u3u1u2(_lwx); 138 Ip_u1u2u3(_mfc0); 139 Ip_u1(_mfhi); 140 Ip_u1(_mflo); 141 Ip_u1u2u3(_mtc0); 142 Ip_u3u1u2(_mul); 143 Ip_u3u1u2(_or); 144 Ip_u2u1u3(_ori); 145 Ip_u2s3u1(_pref); 146 Ip_0(_rfe); 147 Ip_u2u1u3(_rotr); 148 Ip_u2s3u1(_sc); 149 Ip_u2s3u1(_scd); 150 Ip_u2s3u1(_sd); 151 Ip_u2u1u3(_sll); 152 Ip_u3u2u1(_sllv); 153 Ip_s3s1s2(_slt); 154 Ip_u2u1s3(_sltiu); 155 Ip_u3u1u2(_sltu); 156 Ip_u2u1u3(_sra); 157 Ip_u2u1u3(_srl); 158 Ip_u3u2u1(_srlv); 159 Ip_u3u1u2(_subu); 160 Ip_u2s3u1(_sw); 161 Ip_u1(_sync); 162 Ip_u1(_syscall); 163 Ip_0(_tlbp); 164 Ip_0(_tlbr); 165 Ip_0(_tlbwi); 166 Ip_0(_tlbwr); 167 Ip_u1(_wait); 168 Ip_u2u1(_wsbh); 169 Ip_u3u1u2(_xor); 170 Ip_u2u1u3(_xori); 171 Ip_u2u1(_yield); 172 173 174 /* Handle labels. */ 175 struct uasm_label { 176 u32 *addr; 177 int lab; 178 }; 179 180 void ISAFUNC(uasm_build_label)(struct uasm_label **lab, u32 *addr, 181 int lid); 182 #ifdef CONFIG_64BIT 183 int ISAFUNC(uasm_in_compat_space_p)(long addr); 184 #endif 185 int ISAFUNC(uasm_rel_hi)(long val); 186 int ISAFUNC(uasm_rel_lo)(long val); 187 void ISAFUNC(UASM_i_LA_mostly)(u32 **buf, unsigned int rs, long addr); 188 void ISAFUNC(UASM_i_LA)(u32 **buf, unsigned int rs, long addr); 189 190 #define UASM_L_LA(lb) \ 191 static inline void ISAFUNC(uasm_l##lb)(struct uasm_label **lab, u32 *addr) \ 192 { \ 193 ISAFUNC(uasm_build_label)(lab, addr, label##lb); \ 194 } 195 196 /* convenience macros for instructions */ 197 #ifdef CONFIG_64BIT 198 # define UASM_i_ADDIU(buf, rs, rt, val) uasm_i_daddiu(buf, rs, rt, val) 199 # define UASM_i_ADDU(buf, rs, rt, rd) uasm_i_daddu(buf, rs, rt, rd) 200 # define UASM_i_LL(buf, rs, rt, off) uasm_i_lld(buf, rs, rt, off) 201 # define UASM_i_LW(buf, rs, rt, off) uasm_i_ld(buf, rs, rt, off) 202 # define UASM_i_LWX(buf, rs, rt, rd) uasm_i_ldx(buf, rs, rt, rd) 203 # define UASM_i_MFC0(buf, rt, rd...) uasm_i_dmfc0(buf, rt, rd) 204 # define UASM_i_MTC0(buf, rt, rd...) uasm_i_dmtc0(buf, rt, rd) 205 # define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_drotr(buf, rs, rt, sh) 206 # define UASM_i_SC(buf, rs, rt, off) uasm_i_scd(buf, rs, rt, off) 207 # define UASM_i_SLL(buf, rs, rt, sh) uasm_i_dsll(buf, rs, rt, sh) 208 # define UASM_i_SRA(buf, rs, rt, sh) uasm_i_dsra(buf, rs, rt, sh) 209 # define UASM_i_SRL(buf, rs, rt, sh) uasm_i_dsrl(buf, rs, rt, sh) 210 # define UASM_i_SRL_SAFE(buf, rs, rt, sh) uasm_i_dsrl_safe(buf, rs, rt, sh) 211 # define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_dsubu(buf, rs, rt, rd) 212 # define UASM_i_SW(buf, rs, rt, off) uasm_i_sd(buf, rs, rt, off) 213 #else 214 # define UASM_i_ADDIU(buf, rs, rt, val) uasm_i_addiu(buf, rs, rt, val) 215 # define UASM_i_ADDU(buf, rs, rt, rd) uasm_i_addu(buf, rs, rt, rd) 216 # define UASM_i_LL(buf, rs, rt, off) uasm_i_ll(buf, rs, rt, off) 217 # define UASM_i_LW(buf, rs, rt, off) uasm_i_lw(buf, rs, rt, off) 218 # define UASM_i_LWX(buf, rs, rt, rd) uasm_i_lwx(buf, rs, rt, rd) 219 # define UASM_i_MFC0(buf, rt, rd...) uasm_i_mfc0(buf, rt, rd) 220 # define UASM_i_MTC0(buf, rt, rd...) uasm_i_mtc0(buf, rt, rd) 221 # define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_rotr(buf, rs, rt, sh) 222 # define UASM_i_SC(buf, rs, rt, off) uasm_i_sc(buf, rs, rt, off) 223 # define UASM_i_SLL(buf, rs, rt, sh) uasm_i_sll(buf, rs, rt, sh) 224 # define UASM_i_SRA(buf, rs, rt, sh) uasm_i_sra(buf, rs, rt, sh) 225 # define UASM_i_SRL(buf, rs, rt, sh) uasm_i_srl(buf, rs, rt, sh) 226 # define UASM_i_SRL_SAFE(buf, rs, rt, sh) uasm_i_srl(buf, rs, rt, sh) 227 # define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_subu(buf, rs, rt, rd) 228 # define UASM_i_SW(buf, rs, rt, off) uasm_i_sw(buf, rs, rt, off) 229 #endif 230 231 #define uasm_i_b(buf, off) uasm_i_beq(buf, 0, 0, off) 232 #define uasm_i_beqz(buf, rs, off) uasm_i_beq(buf, rs, 0, off) 233 #define uasm_i_beqzl(buf, rs, off) uasm_i_beql(buf, rs, 0, off) 234 #define uasm_i_bnez(buf, rs, off) uasm_i_bne(buf, rs, 0, off) 235 #define uasm_i_bnezl(buf, rs, off) uasm_i_bnel(buf, rs, 0, off) 236 #define uasm_i_ehb(buf) uasm_i_sll(buf, 0, 0, 3) 237 #define uasm_i_move(buf, a, b) UASM_i_ADDU(buf, a, 0, b) 238 #define uasm_i_nop(buf) uasm_i_sll(buf, 0, 0, 0) 239 #define uasm_i_ssnop(buf) uasm_i_sll(buf, 0, 0, 1) 240 241 static inline void uasm_i_drotr_safe(u32 **p, unsigned int a1, 242 unsigned int a2, unsigned int a3) 243 { 244 if (a3 < 32) 245 ISAOPC(_drotr)(p, a1, a2, a3); 246 else 247 ISAOPC(_drotr32)(p, a1, a2, a3 - 32); 248 } 249 250 static inline void uasm_i_dsll_safe(u32 **p, unsigned int a1, 251 unsigned int a2, unsigned int a3) 252 { 253 if (a3 < 32) 254 ISAOPC(_dsll)(p, a1, a2, a3); 255 else 256 ISAOPC(_dsll32)(p, a1, a2, a3 - 32); 257 } 258 259 static inline void uasm_i_dsrl_safe(u32 **p, unsigned int a1, 260 unsigned int a2, unsigned int a3) 261 { 262 if (a3 < 32) 263 ISAOPC(_dsrl)(p, a1, a2, a3); 264 else 265 ISAOPC(_dsrl32)(p, a1, a2, a3 - 32); 266 } 267 268 /* Handle relocations. */ 269 struct uasm_reloc { 270 u32 *addr; 271 unsigned int type; 272 int lab; 273 }; 274 275 /* This is zero so we can use zeroed label arrays. */ 276 #define UASM_LABEL_INVALID 0 277 278 void uasm_r_mips_pc16(struct uasm_reloc **rel, u32 *addr, int lid); 279 void uasm_resolve_relocs(struct uasm_reloc *rel, struct uasm_label *lab); 280 void uasm_move_relocs(struct uasm_reloc *rel, u32 *first, u32 *end, long off); 281 void uasm_move_labels(struct uasm_label *lab, u32 *first, u32 *end, long off); 282 void uasm_copy_handler(struct uasm_reloc *rel, struct uasm_label *lab, 283 u32 *first, u32 *end, u32 *target); 284 int uasm_insn_has_bdelay(struct uasm_reloc *rel, u32 *addr); 285 286 /* Convenience functions for labeled branches. */ 287 void uasm_il_b(u32 **p, struct uasm_reloc **r, int lid); 288 void uasm_il_bbit0(u32 **p, struct uasm_reloc **r, unsigned int reg, 289 unsigned int bit, int lid); 290 void uasm_il_bbit1(u32 **p, struct uasm_reloc **r, unsigned int reg, 291 unsigned int bit, int lid); 292 void uasm_il_beq(u32 **p, struct uasm_reloc **r, unsigned int r1, 293 unsigned int r2, int lid); 294 void uasm_il_beqz(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid); 295 void uasm_il_beqzl(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid); 296 void uasm_il_bgezl(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid); 297 void uasm_il_bgez(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid); 298 void uasm_il_bltz(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid); 299 void uasm_il_bne(u32 **p, struct uasm_reloc **r, unsigned int reg1, 300 unsigned int reg2, int lid); 301 void uasm_il_bnez(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid); 302