1384740dcSRalf Baechle /*
2384740dcSRalf Baechle  * Interface for smsc fdc48m81x Super IO chip
3384740dcSRalf Baechle  *
4384740dcSRalf Baechle  * Author: MontaVista Software, Inc. source@mvista.com
5384740dcSRalf Baechle  *
6384740dcSRalf Baechle  * 2001-2003 (c) MontaVista Software, Inc. This file is licensed under
7384740dcSRalf Baechle  * the terms of the GNU General Public License version 2. This program
8384740dcSRalf Baechle  * is licensed "as is" without any warranty of any kind, whether express
9384740dcSRalf Baechle  * or implied.
10384740dcSRalf Baechle  *
11384740dcSRalf Baechle  * Copyright (C) 2004 MontaVista Software Inc.
12384740dcSRalf Baechle  * Manish Lachwani, mlachwani@mvista.com
13384740dcSRalf Baechle  */
14384740dcSRalf Baechle 
15384740dcSRalf Baechle #ifndef _SMSC_FDC37M81X_H_
16384740dcSRalf Baechle #define _SMSC_FDC37M81X_H_
17384740dcSRalf Baechle 
18384740dcSRalf Baechle /* Common Registers */
19384740dcSRalf Baechle #define SMSC_FDC37M81X_CONFIG_INDEX  0x00
20384740dcSRalf Baechle #define SMSC_FDC37M81X_CONFIG_DATA   0x01
21384740dcSRalf Baechle #define SMSC_FDC37M81X_CONF	     0x02
22384740dcSRalf Baechle #define SMSC_FDC37M81X_INDEX	     0x03
23384740dcSRalf Baechle #define SMSC_FDC37M81X_DNUM	     0x07
24384740dcSRalf Baechle #define SMSC_FDC37M81X_DID	     0x20
25384740dcSRalf Baechle #define SMSC_FDC37M81X_DREV	     0x21
26384740dcSRalf Baechle #define SMSC_FDC37M81X_PCNT	     0x22
27384740dcSRalf Baechle #define SMSC_FDC37M81X_PMGT	     0x23
28384740dcSRalf Baechle #define SMSC_FDC37M81X_OSC	     0x24
29384740dcSRalf Baechle #define SMSC_FDC37M81X_CONFPA0	     0x26
30384740dcSRalf Baechle #define SMSC_FDC37M81X_CONFPA1	     0x27
31384740dcSRalf Baechle #define SMSC_FDC37M81X_TEST4	     0x2B
32384740dcSRalf Baechle #define SMSC_FDC37M81X_TEST5	     0x2C
33384740dcSRalf Baechle #define SMSC_FDC37M81X_TEST1	     0x2D
34384740dcSRalf Baechle #define SMSC_FDC37M81X_TEST2	     0x2E
35384740dcSRalf Baechle #define SMSC_FDC37M81X_TEST3	     0x2F
36384740dcSRalf Baechle 
37384740dcSRalf Baechle /* Logical device numbers */
38384740dcSRalf Baechle #define SMSC_FDC37M81X_FDD	     0x00
39384740dcSRalf Baechle #define SMSC_FDC37M81X_PARALLEL	     0x03
40384740dcSRalf Baechle #define SMSC_FDC37M81X_SERIAL1	     0x04
41384740dcSRalf Baechle #define SMSC_FDC37M81X_SERIAL2	     0x05
42384740dcSRalf Baechle #define SMSC_FDC37M81X_KBD	     0x07
43384740dcSRalf Baechle #define SMSC_FDC37M81X_AUXIO	     0x08
44384740dcSRalf Baechle #define SMSC_FDC37M81X_NONE	     0xff
45384740dcSRalf Baechle 
46384740dcSRalf Baechle /* Logical device Config Registers */
47384740dcSRalf Baechle #define SMSC_FDC37M81X_ACTIVE	     0x30
48384740dcSRalf Baechle #define SMSC_FDC37M81X_BASEADDR0     0x60
49384740dcSRalf Baechle #define SMSC_FDC37M81X_BASEADDR1     0x61
50384740dcSRalf Baechle #define SMSC_FDC37M81X_INT	     0x70
51384740dcSRalf Baechle #define SMSC_FDC37M81X_INT2	     0x72
52384740dcSRalf Baechle #define SMSC_FDC37M81X_LDCR_F0	     0xF0
53384740dcSRalf Baechle 
54384740dcSRalf Baechle /* Chip Config Values */
55384740dcSRalf Baechle #define SMSC_FDC37M81X_CONFIG_ENTER  0x55
56384740dcSRalf Baechle #define SMSC_FDC37M81X_CONFIG_EXIT   0xaa
57384740dcSRalf Baechle #define SMSC_FDC37M81X_CHIP_ID	     0x4d
58384740dcSRalf Baechle 
59384740dcSRalf Baechle unsigned long smsc_fdc37m81x_init(unsigned long port);
60384740dcSRalf Baechle 
61384740dcSRalf Baechle void smsc_fdc37m81x_config_beg(void);
62384740dcSRalf Baechle 
63384740dcSRalf Baechle void smsc_fdc37m81x_config_end(void);
64384740dcSRalf Baechle 
65384740dcSRalf Baechle u8 smsc_fdc37m81x_config_get(u8 reg);
66384740dcSRalf Baechle void smsc_fdc37m81x_config_set(u8 reg, u8 val);
67384740dcSRalf Baechle 
68384740dcSRalf Baechle #endif
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