1384740dcSRalf Baechle /* 2384740dcSRalf Baechle * Author: MontaVista Software, Inc. 3384740dcSRalf Baechle * source@mvista.com 4384740dcSRalf Baechle * 5384740dcSRalf Baechle * Copyright 2001-2002 MontaVista Software Inc. 6384740dcSRalf Baechle * 7384740dcSRalf Baechle * This program is free software; you can redistribute it and/or modify it 8384740dcSRalf Baechle * under the terms of the GNU General Public License as published by the 9384740dcSRalf Baechle * Free Software Foundation; either version 2 of the License, or (at your 10384740dcSRalf Baechle * option) any later version. 11384740dcSRalf Baechle * 12384740dcSRalf Baechle * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 13384740dcSRalf Baechle * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 14384740dcSRalf Baechle * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 15384740dcSRalf Baechle * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 16384740dcSRalf Baechle * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 17384740dcSRalf Baechle * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 18384740dcSRalf Baechle * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 19384740dcSRalf Baechle * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 20384740dcSRalf Baechle * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 21384740dcSRalf Baechle * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 22384740dcSRalf Baechle * 23384740dcSRalf Baechle * You should have received a copy of the GNU General Public License along 24384740dcSRalf Baechle * with this program; if not, write to the Free Software Foundation, Inc., 25384740dcSRalf Baechle * 675 Mass Ave, Cambridge, MA 02139, USA. 26384740dcSRalf Baechle */ 27384740dcSRalf Baechle #ifndef __ASM_TXX9_RBTX4927_H 28384740dcSRalf Baechle #define __ASM_TXX9_RBTX4927_H 29384740dcSRalf Baechle 30384740dcSRalf Baechle #include <asm/txx9/tx4927.h> 31384740dcSRalf Baechle 32384740dcSRalf Baechle #define RBTX4927_PCIMEM 0x08000000 33384740dcSRalf Baechle #define RBTX4927_PCIMEM_SIZE 0x08000000 34384740dcSRalf Baechle #define RBTX4927_PCIIO 0x16000000 35384740dcSRalf Baechle #define RBTX4927_PCIIO_SIZE 0x01000000 36384740dcSRalf Baechle 37384740dcSRalf Baechle #define RBTX4927_LED_ADDR (IO_BASE + TXX9_CE(2) + 0x00001000) 38384740dcSRalf Baechle #define RBTX4927_IMASK_ADDR (IO_BASE + TXX9_CE(2) + 0x00002000) 39384740dcSRalf Baechle #define RBTX4927_IMSTAT_ADDR (IO_BASE + TXX9_CE(2) + 0x00002006) 40384740dcSRalf Baechle #define RBTX4927_SOFTINT_ADDR (IO_BASE + TXX9_CE(2) + 0x00003000) 41384740dcSRalf Baechle #define RBTX4927_SOFTRESET_ADDR (IO_BASE + TXX9_CE(2) + 0x0000f000) 42384740dcSRalf Baechle #define RBTX4927_SOFTRESETLOCK_ADDR (IO_BASE + TXX9_CE(2) + 0x0000f002) 43384740dcSRalf Baechle #define RBTX4927_PCIRESET_ADDR (IO_BASE + TXX9_CE(2) + 0x0000f006) 44384740dcSRalf Baechle #define RBTX4927_BRAMRTC_BASE (IO_BASE + TXX9_CE(2) + 0x00010000) 45384740dcSRalf Baechle #define RBTX4927_ETHER_BASE (IO_BASE + TXX9_CE(2) + 0x00020000) 46384740dcSRalf Baechle 47384740dcSRalf Baechle /* Ethernet port address */ 48384740dcSRalf Baechle #define RBTX4927_ETHER_ADDR (RBTX4927_ETHER_BASE + 0x280) 49384740dcSRalf Baechle 50384740dcSRalf Baechle #define rbtx4927_imask_addr ((__u8 __iomem *)RBTX4927_IMASK_ADDR) 51384740dcSRalf Baechle #define rbtx4927_imstat_addr ((__u8 __iomem *)RBTX4927_IMSTAT_ADDR) 52384740dcSRalf Baechle #define rbtx4927_softint_addr ((__u8 __iomem *)RBTX4927_SOFTINT_ADDR) 53384740dcSRalf Baechle #define rbtx4927_softreset_addr ((__u8 __iomem *)RBTX4927_SOFTRESET_ADDR) 54384740dcSRalf Baechle #define rbtx4927_softresetlock_addr \ 55384740dcSRalf Baechle ((__u8 __iomem *)RBTX4927_SOFTRESETLOCK_ADDR) 56384740dcSRalf Baechle #define rbtx4927_pcireset_addr ((__u8 __iomem *)RBTX4927_PCIRESET_ADDR) 57384740dcSRalf Baechle 58384740dcSRalf Baechle /* bits for ISTAT/IMASK/IMSTAT */ 59384740dcSRalf Baechle #define RBTX4927_INTB_PCID 0 60384740dcSRalf Baechle #define RBTX4927_INTB_PCIC 1 61384740dcSRalf Baechle #define RBTX4927_INTB_PCIB 2 62384740dcSRalf Baechle #define RBTX4927_INTB_PCIA 3 63384740dcSRalf Baechle #define RBTX4927_INTF_PCID (1 << RBTX4927_INTB_PCID) 64384740dcSRalf Baechle #define RBTX4927_INTF_PCIC (1 << RBTX4927_INTB_PCIC) 65384740dcSRalf Baechle #define RBTX4927_INTF_PCIB (1 << RBTX4927_INTB_PCIB) 66384740dcSRalf Baechle #define RBTX4927_INTF_PCIA (1 << RBTX4927_INTB_PCIA) 67384740dcSRalf Baechle 68384740dcSRalf Baechle #define RBTX4927_NR_IRQ_IOC 8 /* IOC */ 69384740dcSRalf Baechle 70384740dcSRalf Baechle #define RBTX4927_IRQ_IOC (TXX9_IRQ_BASE + TX4927_NUM_IR) 71384740dcSRalf Baechle #define RBTX4927_IRQ_IOC_PCID (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCID) 72384740dcSRalf Baechle #define RBTX4927_IRQ_IOC_PCIC (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIC) 73384740dcSRalf Baechle #define RBTX4927_IRQ_IOC_PCIB (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIB) 74384740dcSRalf Baechle #define RBTX4927_IRQ_IOC_PCIA (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIA) 75384740dcSRalf Baechle 76384740dcSRalf Baechle #define RBTX4927_IRQ_IOCINT (TXX9_IRQ_BASE + TX4927_IR_INT(1)) 77384740dcSRalf Baechle 78384740dcSRalf Baechle #ifdef CONFIG_PCI 79384740dcSRalf Baechle #define RBTX4927_ISA_IO_OFFSET RBTX4927_PCIIO 80384740dcSRalf Baechle #else 81384740dcSRalf Baechle #define RBTX4927_ISA_IO_OFFSET 0 82384740dcSRalf Baechle #endif 83384740dcSRalf Baechle 84384740dcSRalf Baechle #define RBTX4927_RTL_8019_BASE (RBTX4927_ETHER_ADDR - mips_io_port_base) 85384740dcSRalf Baechle #define RBTX4927_RTL_8019_IRQ (TXX9_IRQ_BASE + TX4927_IR_INT(3)) 86384740dcSRalf Baechle 87384740dcSRalf Baechle void rbtx4927_prom_init(void); 88384740dcSRalf Baechle void rbtx4927_irq_setup(void); 89384740dcSRalf Baechle struct pci_dev; 90384740dcSRalf Baechle int rbtx4927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); 91384740dcSRalf Baechle 92384740dcSRalf Baechle #endif /* __ASM_TXX9_RBTX4927_H */ 93