11a59d1b8SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */ 2384740dcSRalf Baechle /* 3384740dcSRalf Baechle * Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation 4384740dcSRalf Baechle */ 5384740dcSRalf Baechle #ifndef __ASM_SIBYTE_SWARM_H 6384740dcSRalf Baechle #define __ASM_SIBYTE_SWARM_H 7384740dcSRalf Baechle 8384740dcSRalf Baechle #include <asm/sibyte/sb1250.h> 9384740dcSRalf Baechle #include <asm/sibyte/sb1250_int.h> 10384740dcSRalf Baechle 11384740dcSRalf Baechle #ifdef CONFIG_SIBYTE_SWARM 12384740dcSRalf Baechle #define SIBYTE_BOARD_NAME "BCM91250A (SWARM)" 13384740dcSRalf Baechle #define SIBYTE_HAVE_PCMCIA 1 14384740dcSRalf Baechle #define SIBYTE_HAVE_IDE 1 15384740dcSRalf Baechle #endif 16384740dcSRalf Baechle #ifdef CONFIG_SIBYTE_LITTLESUR 17384740dcSRalf Baechle #define SIBYTE_BOARD_NAME "BCM91250C2 (LittleSur)" 18384740dcSRalf Baechle #define SIBYTE_HAVE_PCMCIA 0 19384740dcSRalf Baechle #define SIBYTE_HAVE_IDE 1 20384740dcSRalf Baechle #define SIBYTE_DEFAULT_CONSOLE "cfe0" 21384740dcSRalf Baechle #endif 22384740dcSRalf Baechle #ifdef CONFIG_SIBYTE_CRHONE 23384740dcSRalf Baechle #define SIBYTE_BOARD_NAME "BCM91125C (CRhone)" 24384740dcSRalf Baechle #define SIBYTE_HAVE_PCMCIA 0 25384740dcSRalf Baechle #define SIBYTE_HAVE_IDE 0 26384740dcSRalf Baechle #endif 27384740dcSRalf Baechle 28384740dcSRalf Baechle /* Generic bus chip selects */ 29384740dcSRalf Baechle #define LEDS_CS 3 30384740dcSRalf Baechle #define LEDS_PHYS 0x100a0000 31384740dcSRalf Baechle 32384740dcSRalf Baechle #ifdef SIBYTE_HAVE_IDE 33384740dcSRalf Baechle #define IDE_CS 4 34384740dcSRalf Baechle #define IDE_PHYS 0x100b0000 35384740dcSRalf Baechle #define K_GPIO_GB_IDE 4 36384740dcSRalf Baechle #define K_INT_GB_IDE (K_INT_GPIO_0 + K_GPIO_GB_IDE) 37384740dcSRalf Baechle #endif 38384740dcSRalf Baechle 39384740dcSRalf Baechle #ifdef SIBYTE_HAVE_PCMCIA 40384740dcSRalf Baechle #define PCMCIA_CS 6 41384740dcSRalf Baechle #define PCMCIA_PHYS 0x11000000 42384740dcSRalf Baechle #define K_GPIO_PC_READY 9 43384740dcSRalf Baechle #define K_INT_PC_READY (K_INT_GPIO_0 + K_GPIO_PC_READY) 44384740dcSRalf Baechle #endif 45384740dcSRalf Baechle 46384740dcSRalf Baechle #endif /* __ASM_SIBYTE_SWARM_H */ 47