xref: /openbmc/linux/arch/mips/include/asm/pgtable-64.h (revision a09d2831)
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 1994, 95, 96, 97, 98, 99, 2000, 2003 Ralf Baechle
7  * Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc.
8  */
9 #ifndef _ASM_PGTABLE_64_H
10 #define _ASM_PGTABLE_64_H
11 
12 #include <linux/linkage.h>
13 
14 #include <asm/addrspace.h>
15 #include <asm/page.h>
16 #include <asm/cachectl.h>
17 #include <asm/fixmap.h>
18 
19 #include <asm-generic/pgtable-nopud.h>
20 
21 /*
22  * Each address space has 2 4K pages as its page directory, giving 1024
23  * (== PTRS_PER_PGD) 8 byte pointers to pmd tables. Each pmd table is a
24  * single 4K page, giving 512 (== PTRS_PER_PMD) 8 byte pointers to page
25  * tables. Each page table is also a single 4K page, giving 512 (==
26  * PTRS_PER_PTE) 8 byte ptes. Each pud entry is initialized to point to
27  * invalid_pmd_table, each pmd entry is initialized to point to
28  * invalid_pte_table, each pte is initialized to 0. When memory is low,
29  * and a pmd table or a page table allocation fails, empty_bad_pmd_table
30  * and empty_bad_page_table is returned back to higher layer code, so
31  * that the failure is recognized later on. Linux does not seem to
32  * handle these failures very well though. The empty_bad_page_table has
33  * invalid pte entries in it, to force page faults.
34  *
35  * Kernel mappings: kernel mappings are held in the swapper_pg_table.
36  * The layout is identical to userspace except it's indexed with the
37  * fault address - VMALLOC_START.
38  */
39 
40 /* PMD_SHIFT determines the size of the area a second-level page table can map */
41 #define PMD_SHIFT	(PAGE_SHIFT + (PAGE_SHIFT + PTE_ORDER - 3))
42 #define PMD_SIZE	(1UL << PMD_SHIFT)
43 #define PMD_MASK	(~(PMD_SIZE-1))
44 
45 /* PGDIR_SHIFT determines what a third-level page table entry can map */
46 #define PGDIR_SHIFT	(PMD_SHIFT + (PAGE_SHIFT + PMD_ORDER - 3))
47 #define PGDIR_SIZE	(1UL << PGDIR_SHIFT)
48 #define PGDIR_MASK	(~(PGDIR_SIZE-1))
49 
50 /*
51  * For 4kB page size we use a 3 level page tree and an 8kB pud, which
52  * permits us mapping 40 bits of virtual address space.
53  *
54  * We used to implement 41 bits by having an order 1 pmd level but that seemed
55  * rather pointless.
56  *
57  * For 8kB page size we use a 3 level page tree which permits a total of
58  * 8TB of address space.  Alternatively a 33-bit / 8GB organization using
59  * two levels would be easy to implement.
60  *
61  * For 16kB page size we use a 2 level page tree which permits a total of
62  * 36 bits of virtual address space.  We could add a third level but it seems
63  * like at the moment there's no need for this.
64  *
65  * For 64kB page size we use a 2 level page table tree for a total of 42 bits
66  * of virtual address space.
67  */
68 #ifdef CONFIG_PAGE_SIZE_4KB
69 #define PGD_ORDER		1
70 #define PUD_ORDER		aieeee_attempt_to_allocate_pud
71 #define PMD_ORDER		0
72 #define PTE_ORDER		0
73 #endif
74 #ifdef CONFIG_PAGE_SIZE_8KB
75 #define PGD_ORDER		0
76 #define PUD_ORDER		aieeee_attempt_to_allocate_pud
77 #define PMD_ORDER		0
78 #define PTE_ORDER		0
79 #endif
80 #ifdef CONFIG_PAGE_SIZE_16KB
81 #define PGD_ORDER		0
82 #define PUD_ORDER		aieeee_attempt_to_allocate_pud
83 #define PMD_ORDER		0
84 #define PTE_ORDER		0
85 #endif
86 #ifdef CONFIG_PAGE_SIZE_32KB
87 #define PGD_ORDER		0
88 #define PUD_ORDER		aieeee_attempt_to_allocate_pud
89 #define PMD_ORDER		0
90 #define PTE_ORDER		0
91 #endif
92 #ifdef CONFIG_PAGE_SIZE_64KB
93 #define PGD_ORDER		0
94 #define PUD_ORDER		aieeee_attempt_to_allocate_pud
95 #define PMD_ORDER		0
96 #define PTE_ORDER		0
97 #endif
98 
99 #define PTRS_PER_PGD	((PAGE_SIZE << PGD_ORDER) / sizeof(pgd_t))
100 #define PTRS_PER_PMD	((PAGE_SIZE << PMD_ORDER) / sizeof(pmd_t))
101 #define PTRS_PER_PTE	((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t))
102 
103 #if PGDIR_SIZE >= TASK_SIZE
104 #define USER_PTRS_PER_PGD       (1)
105 #else
106 #define USER_PTRS_PER_PGD	(TASK_SIZE / PGDIR_SIZE)
107 #endif
108 #define FIRST_USER_ADDRESS	0UL
109 
110 #define VMALLOC_START		MAP_BASE
111 #define VMALLOC_END	\
112 	(VMALLOC_START + \
113 	 PTRS_PER_PGD * PTRS_PER_PMD * PTRS_PER_PTE * PAGE_SIZE - (1UL << 32))
114 #if defined(CONFIG_MODULES) && defined(KBUILD_64BIT_SYM32) && \
115 	VMALLOC_START != CKSSEG
116 /* Load modules into 32bit-compatible segment. */
117 #define MODULE_START	CKSSEG
118 #define MODULE_END	(FIXADDR_START-2*PAGE_SIZE)
119 #endif
120 
121 #define pte_ERROR(e) \
122 	printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e))
123 #define pmd_ERROR(e) \
124 	printk("%s:%d: bad pmd %016lx.\n", __FILE__, __LINE__, pmd_val(e))
125 #define pgd_ERROR(e) \
126 	printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e))
127 
128 extern pte_t invalid_pte_table[PTRS_PER_PTE];
129 extern pte_t empty_bad_page_table[PTRS_PER_PTE];
130 extern pmd_t invalid_pmd_table[PTRS_PER_PMD];
131 extern pmd_t empty_bad_pmd_table[PTRS_PER_PMD];
132 
133 /*
134  * Empty pgd/pmd entries point to the invalid_pte_table.
135  */
136 static inline int pmd_none(pmd_t pmd)
137 {
138 	return pmd_val(pmd) == (unsigned long) invalid_pte_table;
139 }
140 
141 #define pmd_bad(pmd)		(pmd_val(pmd) & ~PAGE_MASK)
142 
143 static inline int pmd_present(pmd_t pmd)
144 {
145 	return pmd_val(pmd) != (unsigned long) invalid_pte_table;
146 }
147 
148 static inline void pmd_clear(pmd_t *pmdp)
149 {
150 	pmd_val(*pmdp) = ((unsigned long) invalid_pte_table);
151 }
152 
153 /*
154  * Empty pud entries point to the invalid_pmd_table.
155  */
156 static inline int pud_none(pud_t pud)
157 {
158 	return pud_val(pud) == (unsigned long) invalid_pmd_table;
159 }
160 
161 static inline int pud_bad(pud_t pud)
162 {
163 	return pud_val(pud) & ~PAGE_MASK;
164 }
165 
166 static inline int pud_present(pud_t pud)
167 {
168 	return pud_val(pud) != (unsigned long) invalid_pmd_table;
169 }
170 
171 static inline void pud_clear(pud_t *pudp)
172 {
173 	pud_val(*pudp) = ((unsigned long) invalid_pmd_table);
174 }
175 
176 #define pte_page(x)		pfn_to_page(pte_pfn(x))
177 
178 #ifdef CONFIG_CPU_VR41XX
179 #define pte_pfn(x)		((unsigned long)((x).pte >> (PAGE_SHIFT + 2)))
180 #define pfn_pte(pfn, prot)	__pte(((pfn) << (PAGE_SHIFT + 2)) | pgprot_val(prot))
181 #else
182 #define pte_pfn(x)		((unsigned long)((x).pte >> PAGE_SHIFT))
183 #define pfn_pte(pfn, prot)	__pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
184 #endif
185 
186 #define __pgd_offset(address)	pgd_index(address)
187 #define __pud_offset(address)	(((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
188 #define __pmd_offset(address)	pmd_index(address)
189 
190 /* to find an entry in a kernel page-table-directory */
191 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
192 
193 #define pgd_index(address)	(((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
194 #define pmd_index(address)	(((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
195 
196 /* to find an entry in a page-table-directory */
197 #define pgd_offset(mm, addr)	((mm)->pgd + pgd_index(addr))
198 
199 static inline unsigned long pud_page_vaddr(pud_t pud)
200 {
201 	return pud_val(pud);
202 }
203 #define pud_phys(pud)		virt_to_phys((void *)pud_val(pud))
204 #define pud_page(pud)		(pfn_to_page(pud_phys(pud) >> PAGE_SHIFT))
205 
206 /* Find an entry in the second-level page table.. */
207 static inline pmd_t *pmd_offset(pud_t * pud, unsigned long address)
208 {
209 	return (pmd_t *) pud_page_vaddr(*pud) + pmd_index(address);
210 }
211 
212 /* Find an entry in the third-level page table.. */
213 #define __pte_offset(address)						\
214 	(((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
215 #define pte_offset(dir, address)					\
216 	((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address))
217 #define pte_offset_kernel(dir, address)					\
218 	((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address))
219 #define pte_offset_map(dir, address)					\
220 	((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address))
221 #define pte_offset_map_nested(dir, address)				\
222 	((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address))
223 #define pte_unmap(pte) ((void)(pte))
224 #define pte_unmap_nested(pte) ((void)(pte))
225 
226 /*
227  * Initialize a new pgd / pmd table with invalid pointers.
228  */
229 extern void pgd_init(unsigned long page);
230 extern void pmd_init(unsigned long page, unsigned long pagetable);
231 
232 /*
233  * Non-present pages:  high 24 bits are offset, next 8 bits type,
234  * low 32 bits zero.
235  */
236 static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
237 { pte_t pte; pte_val(pte) = (type << 32) | (offset << 40); return pte; }
238 
239 #define __swp_type(x)		(((x).val >> 32) & 0xff)
240 #define __swp_offset(x)		((x).val >> 40)
241 #define __swp_entry(type, offset) ((swp_entry_t) { pte_val(mk_swap_pte((type), (offset))) })
242 #define __pte_to_swp_entry(pte)	((swp_entry_t) { pte_val(pte) })
243 #define __swp_entry_to_pte(x)	((pte_t) { (x).val })
244 
245 /*
246  * Bits 0, 4, 6, and 7 are taken. Let's leave bits 1, 2, 3, and 5 alone to
247  * make things easier, and only use the upper 56 bits for the page offset...
248  */
249 #define PTE_FILE_MAX_BITS	56
250 
251 #define pte_to_pgoff(_pte)	((_pte).pte >> 8)
252 #define pgoff_to_pte(off)	((pte_t) { ((off) << 8) | _PAGE_FILE })
253 
254 #endif /* _ASM_PGTABLE_64_H */
255