1 /***********************license start*************** 2 * Author: Cavium Networks 3 * 4 * Contact: support@caviumnetworks.com 5 * This file is part of the OCTEON SDK 6 * 7 * Copyright (c) 2003-2008 Cavium Networks 8 * 9 * This file is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License, Version 2, as 11 * published by the Free Software Foundation. 12 * 13 * This file is distributed in the hope that it will be useful, but 14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty 15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 16 * NONINFRINGEMENT. See the GNU General Public License for more 17 * details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this file; if not, write to the Free Software 21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 22 * or visit http://www.gnu.org/licenses/. 23 * 24 * This file may also be available under a different license from Cavium. 25 * Contact Cavium Networks for more information 26 ***********************license end**************************************/ 27 28 /* 29 * File defining checks for different Octeon features. 30 */ 31 32 #ifndef __OCTEON_FEATURE_H__ 33 #define __OCTEON_FEATURE_H__ 34 #include <asm/octeon/cvmx-mio-defs.h> 35 #include <asm/octeon/cvmx-rnm-defs.h> 36 37 enum octeon_feature { 38 /* CN68XX uses port kinds for packet interface */ 39 OCTEON_FEATURE_PKND, 40 /* CN68XX has different fields in word0 - word2 */ 41 OCTEON_FEATURE_CN68XX_WQE, 42 /* 43 * Octeon models in the CN5XXX family and higher support 44 * atomic add instructions to memory (saa/saad). 45 */ 46 OCTEON_FEATURE_SAAD, 47 /* Does this Octeon support the ZIP offload engine? */ 48 OCTEON_FEATURE_ZIP, 49 /* Does this Octeon support crypto acceleration using COP2? */ 50 OCTEON_FEATURE_CRYPTO, 51 OCTEON_FEATURE_DORM_CRYPTO, 52 /* Does this Octeon support PCI express? */ 53 OCTEON_FEATURE_PCIE, 54 /* Does this Octeon support SRIOs */ 55 OCTEON_FEATURE_SRIO, 56 /* Does this Octeon support Interlaken */ 57 OCTEON_FEATURE_ILK, 58 /* Some Octeon models support internal memory for storing 59 * cryptographic keys */ 60 OCTEON_FEATURE_KEY_MEMORY, 61 /* Octeon has a LED controller for banks of external LEDs */ 62 OCTEON_FEATURE_LED_CONTROLLER, 63 /* Octeon has a trace buffer */ 64 OCTEON_FEATURE_TRA, 65 /* Octeon has a management port */ 66 OCTEON_FEATURE_MGMT_PORT, 67 /* Octeon has a raid unit */ 68 OCTEON_FEATURE_RAID, 69 /* Octeon has a builtin USB */ 70 OCTEON_FEATURE_USB, 71 /* Octeon IPD can run without using work queue entries */ 72 OCTEON_FEATURE_NO_WPTR, 73 /* Octeon has DFA state machines */ 74 OCTEON_FEATURE_DFA, 75 /* Octeon MDIO block supports clause 45 transactions for 10 76 * Gig support */ 77 OCTEON_FEATURE_MDIO_CLAUSE_45, 78 /* 79 * CN52XX and CN56XX used a block named NPEI for PCIe 80 * access. Newer chips replaced this with SLI+DPI. 81 */ 82 OCTEON_FEATURE_NPEI, 83 OCTEON_FEATURE_HFA, 84 OCTEON_FEATURE_DFM, 85 OCTEON_FEATURE_CIU2, 86 OCTEON_MAX_FEATURE 87 }; 88 89 static inline int cvmx_fuse_read(int fuse); 90 91 /** 92 * Determine if the current Octeon supports a specific feature. These 93 * checks have been optimized to be fairly quick, but they should still 94 * be kept out of fast path code. 95 * 96 * @feature: Feature to check for. This should always be a constant so the 97 * compiler can remove the switch statement through optimization. 98 * 99 * Returns Non zero if the feature exists. Zero if the feature does not 100 * exist. 101 */ 102 static inline int octeon_has_feature(enum octeon_feature feature) 103 { 104 switch (feature) { 105 case OCTEON_FEATURE_SAAD: 106 return !OCTEON_IS_MODEL(OCTEON_CN3XXX); 107 108 case OCTEON_FEATURE_ZIP: 109 if (OCTEON_IS_MODEL(OCTEON_CN30XX) 110 || OCTEON_IS_MODEL(OCTEON_CN50XX) 111 || OCTEON_IS_MODEL(OCTEON_CN52XX)) 112 return 0; 113 else if (OCTEON_IS_MODEL(OCTEON_CN38XX_PASS1)) 114 return 1; 115 else 116 return !cvmx_fuse_read(121); 117 118 case OCTEON_FEATURE_CRYPTO: 119 if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) { 120 union cvmx_mio_fus_dat2 fus_2; 121 fus_2.u64 = cvmx_read_csr(CVMX_MIO_FUS_DAT2); 122 if (fus_2.s.nocrypto || fus_2.s.nomul) { 123 return 0; 124 } else if (!fus_2.s.dorm_crypto) { 125 return 1; 126 } else { 127 union cvmx_rnm_ctl_status st; 128 st.u64 = cvmx_read_csr(CVMX_RNM_CTL_STATUS); 129 return st.s.eer_val; 130 } 131 } else { 132 return !cvmx_fuse_read(90); 133 } 134 135 case OCTEON_FEATURE_DORM_CRYPTO: 136 if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) { 137 union cvmx_mio_fus_dat2 fus_2; 138 fus_2.u64 = cvmx_read_csr(CVMX_MIO_FUS_DAT2); 139 return !fus_2.s.nocrypto && !fus_2.s.nomul && fus_2.s.dorm_crypto; 140 } else { 141 return 0; 142 } 143 144 case OCTEON_FEATURE_PCIE: 145 return OCTEON_IS_MODEL(OCTEON_CN56XX) 146 || OCTEON_IS_MODEL(OCTEON_CN52XX) 147 || OCTEON_IS_MODEL(OCTEON_CN6XXX); 148 149 case OCTEON_FEATURE_SRIO: 150 return OCTEON_IS_MODEL(OCTEON_CN63XX) 151 || OCTEON_IS_MODEL(OCTEON_CN66XX); 152 153 case OCTEON_FEATURE_ILK: 154 return (OCTEON_IS_MODEL(OCTEON_CN68XX)); 155 156 case OCTEON_FEATURE_KEY_MEMORY: 157 return OCTEON_IS_MODEL(OCTEON_CN38XX) 158 || OCTEON_IS_MODEL(OCTEON_CN58XX) 159 || OCTEON_IS_MODEL(OCTEON_CN56XX) 160 || OCTEON_IS_MODEL(OCTEON_CN6XXX); 161 162 case OCTEON_FEATURE_LED_CONTROLLER: 163 return OCTEON_IS_MODEL(OCTEON_CN38XX) 164 || OCTEON_IS_MODEL(OCTEON_CN58XX) 165 || OCTEON_IS_MODEL(OCTEON_CN56XX); 166 167 case OCTEON_FEATURE_TRA: 168 return !(OCTEON_IS_MODEL(OCTEON_CN30XX) 169 || OCTEON_IS_MODEL(OCTEON_CN50XX)); 170 case OCTEON_FEATURE_MGMT_PORT: 171 return OCTEON_IS_MODEL(OCTEON_CN56XX) 172 || OCTEON_IS_MODEL(OCTEON_CN52XX) 173 || OCTEON_IS_MODEL(OCTEON_CN6XXX); 174 175 case OCTEON_FEATURE_RAID: 176 return OCTEON_IS_MODEL(OCTEON_CN56XX) 177 || OCTEON_IS_MODEL(OCTEON_CN52XX) 178 || OCTEON_IS_MODEL(OCTEON_CN6XXX); 179 180 case OCTEON_FEATURE_USB: 181 return !(OCTEON_IS_MODEL(OCTEON_CN38XX) 182 || OCTEON_IS_MODEL(OCTEON_CN58XX)); 183 184 case OCTEON_FEATURE_NO_WPTR: 185 return (OCTEON_IS_MODEL(OCTEON_CN56XX) 186 || OCTEON_IS_MODEL(OCTEON_CN52XX) 187 || OCTEON_IS_MODEL(OCTEON_CN6XXX)) 188 && !OCTEON_IS_MODEL(OCTEON_CN56XX_PASS1_X) 189 && !OCTEON_IS_MODEL(OCTEON_CN52XX_PASS1_X); 190 191 case OCTEON_FEATURE_DFA: 192 if (!OCTEON_IS_MODEL(OCTEON_CN38XX) 193 && !OCTEON_IS_MODEL(OCTEON_CN31XX) 194 && !OCTEON_IS_MODEL(OCTEON_CN58XX)) 195 return 0; 196 else if (OCTEON_IS_MODEL(OCTEON_CN3020)) 197 return 0; 198 else 199 return !cvmx_fuse_read(120); 200 201 case OCTEON_FEATURE_HFA: 202 if (!OCTEON_IS_MODEL(OCTEON_CN6XXX)) 203 return 0; 204 else 205 return !cvmx_fuse_read(90); 206 207 case OCTEON_FEATURE_DFM: 208 if (!(OCTEON_IS_MODEL(OCTEON_CN63XX) 209 || OCTEON_IS_MODEL(OCTEON_CN66XX))) 210 return 0; 211 else 212 return !cvmx_fuse_read(90); 213 214 case OCTEON_FEATURE_MDIO_CLAUSE_45: 215 return !(OCTEON_IS_MODEL(OCTEON_CN3XXX) 216 || OCTEON_IS_MODEL(OCTEON_CN58XX) 217 || OCTEON_IS_MODEL(OCTEON_CN50XX)); 218 219 case OCTEON_FEATURE_NPEI: 220 return OCTEON_IS_MODEL(OCTEON_CN56XX) 221 || OCTEON_IS_MODEL(OCTEON_CN52XX); 222 223 case OCTEON_FEATURE_PKND: 224 return OCTEON_IS_MODEL(OCTEON_CN68XX); 225 226 case OCTEON_FEATURE_CN68XX_WQE: 227 return OCTEON_IS_MODEL(OCTEON_CN68XX); 228 229 case OCTEON_FEATURE_CIU2: 230 return OCTEON_IS_MODEL(OCTEON_CN68XX); 231 232 default: 233 break; 234 } 235 return 0; 236 } 237 238 #endif /* __OCTEON_FEATURE_H__ */ 239