1 /***********************license start*************** 2 * Author: Cavium Networks 3 * 4 * Contact: support@caviumnetworks.com 5 * This file is part of the OCTEON SDK 6 * 7 * Copyright (c) 2003-2008 Cavium Networks 8 * 9 * This file is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License, Version 2, as 11 * published by the Free Software Foundation. 12 * 13 * This file is distributed in the hope that it will be useful, but 14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty 15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 16 * NONINFRINGEMENT. See the GNU General Public License for more 17 * details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this file; if not, write to the Free Software 21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 22 * or visit http://www.gnu.org/licenses/. 23 * 24 * This file may also be available under a different license from Cavium. 25 * Contact Cavium Networks for more information 26 ***********************license end**************************************/ 27 28 /* 29 * Header file containing the ABI with the bootloader. 30 */ 31 32 #ifndef __CVMX_BOOTINFO_H__ 33 #define __CVMX_BOOTINFO_H__ 34 35 /* 36 * Current major and minor versions of the CVMX bootinfo block that is 37 * passed from the bootloader to the application. This is versioned 38 * so that applications can properly handle multiple bootloader 39 * versions. 40 */ 41 #define CVMX_BOOTINFO_MAJ_VER 1 42 #define CVMX_BOOTINFO_MIN_VER 3 43 44 #if (CVMX_BOOTINFO_MAJ_VER == 1) 45 #define CVMX_BOOTINFO_OCTEON_SERIAL_LEN 20 46 /* 47 * This structure is populated by the bootloader. For binary 48 * compatibility the only changes that should be made are 49 * adding members to the end of the structure, and the minor 50 * version should be incremented at that time. 51 * If an incompatible change is made, the major version 52 * must be incremented, and the minor version should be reset 53 * to 0. 54 */ 55 struct cvmx_bootinfo { 56 #ifdef __BIG_ENDIAN_BITFIELD 57 uint32_t major_version; 58 uint32_t minor_version; 59 60 uint64_t stack_top; 61 uint64_t heap_base; 62 uint64_t heap_end; 63 uint64_t desc_vaddr; 64 65 uint32_t exception_base_addr; 66 uint32_t stack_size; 67 uint32_t flags; 68 uint32_t core_mask; 69 /* DRAM size in megabytes */ 70 uint32_t dram_size; 71 /* physical address of free memory descriptor block*/ 72 uint32_t phy_mem_desc_addr; 73 /* used to pass flags from app to debugger */ 74 uint32_t debugger_flags_base_addr; 75 76 /* CPU clock speed, in hz */ 77 uint32_t eclock_hz; 78 79 /* DRAM clock speed, in hz */ 80 uint32_t dclock_hz; 81 82 uint32_t reserved0; 83 uint16_t board_type; 84 uint8_t board_rev_major; 85 uint8_t board_rev_minor; 86 uint16_t reserved1; 87 uint8_t reserved2; 88 uint8_t reserved3; 89 char board_serial_number[CVMX_BOOTINFO_OCTEON_SERIAL_LEN]; 90 uint8_t mac_addr_base[6]; 91 uint8_t mac_addr_count; 92 #if (CVMX_BOOTINFO_MIN_VER >= 1) 93 /* 94 * Several boards support compact flash on the Octeon boot 95 * bus. The CF memory spaces may be mapped to different 96 * addresses on different boards. These are the physical 97 * addresses, so care must be taken to use the correct 98 * XKPHYS/KSEG0 addressing depending on the application's 99 * ABI. These values will be 0 if CF is not present. 100 */ 101 uint64_t compact_flash_common_base_addr; 102 uint64_t compact_flash_attribute_base_addr; 103 /* 104 * Base address of the LED display (as on EBT3000 board) 105 * This will be 0 if LED display not present. 106 */ 107 uint64_t led_display_base_addr; 108 #endif 109 #if (CVMX_BOOTINFO_MIN_VER >= 2) 110 /* DFA reference clock in hz (if applicable)*/ 111 uint32_t dfa_ref_clock_hz; 112 113 /* 114 * flags indicating various configuration options. These 115 * flags supercede the 'flags' variable and should be used 116 * instead if available. 117 */ 118 uint32_t config_flags; 119 #endif 120 #if (CVMX_BOOTINFO_MIN_VER >= 3) 121 /* 122 * Address of the OF Flattened Device Tree structure 123 * describing the board. 124 */ 125 uint64_t fdt_addr; 126 #endif 127 #else /* __BIG_ENDIAN */ 128 /* 129 * Little-Endian: When the CPU mode is switched to 130 * little-endian, the view of the structure has some of the 131 * fields swapped. 132 */ 133 uint32_t minor_version; 134 uint32_t major_version; 135 136 uint64_t stack_top; 137 uint64_t heap_base; 138 uint64_t heap_end; 139 uint64_t desc_vaddr; 140 141 uint32_t stack_size; 142 uint32_t exception_base_addr; 143 144 uint32_t core_mask; 145 uint32_t flags; 146 147 uint32_t phy_mem_desc_addr; 148 uint32_t dram_size; 149 150 uint32_t eclock_hz; 151 uint32_t debugger_flags_base_addr; 152 153 uint32_t reserved0; 154 uint32_t dclock_hz; 155 156 uint8_t reserved3; 157 uint8_t reserved2; 158 uint16_t reserved1; 159 uint8_t board_rev_minor; 160 uint8_t board_rev_major; 161 uint16_t board_type; 162 163 char board_serial_number[CVMX_BOOTINFO_OCTEON_SERIAL_LEN]; 164 uint8_t mac_addr_base[6]; 165 uint8_t mac_addr_count; 166 uint8_t pad[5]; 167 168 #if (CVMX_BOOTINFO_MIN_VER >= 1) 169 uint64_t compact_flash_common_base_addr; 170 uint64_t compact_flash_attribute_base_addr; 171 uint64_t led_display_base_addr; 172 #endif 173 #if (CVMX_BOOTINFO_MIN_VER >= 2) 174 uint32_t config_flags; 175 uint32_t dfa_ref_clock_hz; 176 #endif 177 #if (CVMX_BOOTINFO_MIN_VER >= 3) 178 uint64_t fdt_addr; 179 #endif 180 #endif 181 }; 182 183 #define CVMX_BOOTINFO_CFG_FLAG_PCI_HOST (1ull << 0) 184 #define CVMX_BOOTINFO_CFG_FLAG_PCI_TARGET (1ull << 1) 185 #define CVMX_BOOTINFO_CFG_FLAG_DEBUG (1ull << 2) 186 #define CVMX_BOOTINFO_CFG_FLAG_NO_MAGIC (1ull << 3) 187 /* This flag is set if the TLB mappings are not contained in the 188 * 0x10000000 - 0x20000000 boot bus region. */ 189 #define CVMX_BOOTINFO_CFG_FLAG_OVERSIZE_TLB_MAPPING (1ull << 4) 190 #define CVMX_BOOTINFO_CFG_FLAG_BREAK (1ull << 5) 191 192 #endif /* (CVMX_BOOTINFO_MAJ_VER == 1) */ 193 194 /* Type defines for board and chip types */ 195 enum cvmx_board_types_enum { 196 CVMX_BOARD_TYPE_NULL = 0, 197 CVMX_BOARD_TYPE_SIM = 1, 198 CVMX_BOARD_TYPE_EBT3000 = 2, 199 CVMX_BOARD_TYPE_KODAMA = 3, 200 CVMX_BOARD_TYPE_NIAGARA = 4, 201 CVMX_BOARD_TYPE_NAC38 = 5, /* formerly NAO38 */ 202 CVMX_BOARD_TYPE_THUNDER = 6, 203 CVMX_BOARD_TYPE_TRANTOR = 7, 204 CVMX_BOARD_TYPE_EBH3000 = 8, 205 CVMX_BOARD_TYPE_EBH3100 = 9, 206 CVMX_BOARD_TYPE_HIKARI = 10, 207 CVMX_BOARD_TYPE_CN3010_EVB_HS5 = 11, 208 CVMX_BOARD_TYPE_CN3005_EVB_HS5 = 12, 209 CVMX_BOARD_TYPE_KBP = 13, 210 /* Deprecated, CVMX_BOARD_TYPE_CN3010_EVB_HS5 supports the CN3020 */ 211 CVMX_BOARD_TYPE_CN3020_EVB_HS5 = 14, 212 CVMX_BOARD_TYPE_EBT5800 = 15, 213 CVMX_BOARD_TYPE_NICPRO2 = 16, 214 CVMX_BOARD_TYPE_EBH5600 = 17, 215 CVMX_BOARD_TYPE_EBH5601 = 18, 216 CVMX_BOARD_TYPE_EBH5200 = 19, 217 CVMX_BOARD_TYPE_BBGW_REF = 20, 218 CVMX_BOARD_TYPE_NIC_XLE_4G = 21, 219 CVMX_BOARD_TYPE_EBT5600 = 22, 220 CVMX_BOARD_TYPE_EBH5201 = 23, 221 CVMX_BOARD_TYPE_EBT5200 = 24, 222 CVMX_BOARD_TYPE_CB5600 = 25, 223 CVMX_BOARD_TYPE_CB5601 = 26, 224 CVMX_BOARD_TYPE_CB5200 = 27, 225 /* Special 'generic' board type, supports many boards */ 226 CVMX_BOARD_TYPE_GENERIC = 28, 227 CVMX_BOARD_TYPE_EBH5610 = 29, 228 CVMX_BOARD_TYPE_LANAI2_A = 30, 229 CVMX_BOARD_TYPE_LANAI2_U = 31, 230 CVMX_BOARD_TYPE_EBB5600 = 32, 231 CVMX_BOARD_TYPE_EBB6300 = 33, 232 CVMX_BOARD_TYPE_NIC_XLE_10G = 34, 233 CVMX_BOARD_TYPE_LANAI2_G = 35, 234 CVMX_BOARD_TYPE_EBT5810 = 36, 235 CVMX_BOARD_TYPE_NIC10E = 37, 236 CVMX_BOARD_TYPE_EP6300C = 38, 237 CVMX_BOARD_TYPE_EBB6800 = 39, 238 CVMX_BOARD_TYPE_NIC4E = 40, 239 CVMX_BOARD_TYPE_NIC2E = 41, 240 CVMX_BOARD_TYPE_EBB6600 = 42, 241 CVMX_BOARD_TYPE_REDWING = 43, 242 CVMX_BOARD_TYPE_NIC68_4 = 44, 243 CVMX_BOARD_TYPE_NIC10E_66 = 45, 244 CVMX_BOARD_TYPE_MAX, 245 246 /* 247 * The range from CVMX_BOARD_TYPE_MAX to 248 * CVMX_BOARD_TYPE_CUST_DEFINED_MIN is reserved for future 249 * SDK use. 250 */ 251 252 /* 253 * Set aside a range for customer boards. These numbers are managed 254 * by Cavium. 255 */ 256 CVMX_BOARD_TYPE_CUST_DEFINED_MIN = 10000, 257 CVMX_BOARD_TYPE_CUST_WSX16 = 10001, 258 CVMX_BOARD_TYPE_CUST_NS0216 = 10002, 259 CVMX_BOARD_TYPE_CUST_NB5 = 10003, 260 CVMX_BOARD_TYPE_CUST_WMR500 = 10004, 261 CVMX_BOARD_TYPE_CUST_ITB101 = 10005, 262 CVMX_BOARD_TYPE_CUST_NTE102 = 10006, 263 CVMX_BOARD_TYPE_CUST_AGS103 = 10007, 264 CVMX_BOARD_TYPE_CUST_GST104 = 10008, 265 CVMX_BOARD_TYPE_CUST_GCT105 = 10009, 266 CVMX_BOARD_TYPE_CUST_AGS106 = 10010, 267 CVMX_BOARD_TYPE_CUST_SGM107 = 10011, 268 CVMX_BOARD_TYPE_CUST_GCT108 = 10012, 269 CVMX_BOARD_TYPE_CUST_AGS109 = 10013, 270 CVMX_BOARD_TYPE_CUST_GCT110 = 10014, 271 CVMX_BOARD_TYPE_CUST_L2_AIR_SENDER = 10015, 272 CVMX_BOARD_TYPE_CUST_L2_AIR_RECEIVER = 10016, 273 CVMX_BOARD_TYPE_CUST_L2_ACCTON2_TX = 10017, 274 CVMX_BOARD_TYPE_CUST_L2_ACCTON2_RX = 10018, 275 CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_TX = 10019, 276 CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_RX = 10020, 277 CVMX_BOARD_TYPE_CUST_L2_ZINWELL = 10021, 278 CVMX_BOARD_TYPE_CUST_DEFINED_MAX = 20000, 279 280 /* 281 * Set aside a range for customer private use. The SDK won't 282 * use any numbers in this range. 283 */ 284 CVMX_BOARD_TYPE_CUST_PRIVATE_MIN = 20001, 285 CVMX_BOARD_TYPE_UBNT_E100 = 20002, 286 CVMX_BOARD_TYPE_CUST_DSR1000N = 20006, 287 CVMX_BOARD_TYPE_CUST_PRIVATE_MAX = 30000, 288 289 /* The remaining range is reserved for future use. */ 290 }; 291 292 enum cvmx_chip_types_enum { 293 CVMX_CHIP_TYPE_NULL = 0, 294 CVMX_CHIP_SIM_TYPE_DEPRECATED = 1, 295 CVMX_CHIP_TYPE_OCTEON_SAMPLE = 2, 296 CVMX_CHIP_TYPE_MAX, 297 }; 298 299 /* Compatibility alias for NAC38 name change, planned to be removed 300 * from SDK 1.7 */ 301 #define CVMX_BOARD_TYPE_NAO38 CVMX_BOARD_TYPE_NAC38 302 303 /* Functions to return string based on type */ 304 #define ENUM_BRD_TYPE_CASE(x) \ 305 case x: return(#x + 16); /* Skip CVMX_BOARD_TYPE_ */ 306 static inline const char *cvmx_board_type_to_string(enum 307 cvmx_board_types_enum type) 308 { 309 switch (type) { 310 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NULL) 311 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_SIM) 312 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT3000) 313 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_KODAMA) 314 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIAGARA) 315 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NAC38) 316 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_THUNDER) 317 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_TRANTOR) 318 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH3000) 319 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH3100) 320 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_HIKARI) 321 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CN3010_EVB_HS5) 322 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CN3005_EVB_HS5) 323 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_KBP) 324 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CN3020_EVB_HS5) 325 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT5800) 326 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NICPRO2) 327 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5600) 328 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5601) 329 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5200) 330 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_BBGW_REF) 331 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC_XLE_4G) 332 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT5600) 333 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5201) 334 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT5200) 335 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CB5600) 336 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CB5601) 337 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CB5200) 338 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_GENERIC) 339 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5610) 340 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_LANAI2_A) 341 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_LANAI2_U) 342 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB5600) 343 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB6300) 344 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC_XLE_10G) 345 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_LANAI2_G) 346 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT5810) 347 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC10E) 348 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EP6300C) 349 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB6800) 350 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC4E) 351 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC2E) 352 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBB6600) 353 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_REDWING) 354 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC68_4) 355 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC10E_66) 356 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MAX) 357 358 /* Customer boards listed here */ 359 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_DEFINED_MIN) 360 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_WSX16) 361 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_NS0216) 362 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_NB5) 363 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_WMR500) 364 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_ITB101) 365 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_NTE102) 366 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_AGS103) 367 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_GST104) 368 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_GCT105) 369 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_AGS106) 370 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_SGM107) 371 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_GCT108) 372 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_AGS109) 373 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_GCT110) 374 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_AIR_SENDER) 375 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_AIR_RECEIVER) 376 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_ACCTON2_TX) 377 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_ACCTON2_RX) 378 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_TX) 379 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_WSTRNSNIC_RX) 380 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_L2_ZINWELL) 381 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_DEFINED_MAX) 382 383 /* Customer private range */ 384 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MIN) 385 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E100) 386 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_DSR1000N) 387 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MAX) 388 } 389 return "Unsupported Board"; 390 } 391 392 #define ENUM_CHIP_TYPE_CASE(x) \ 393 case x: return(#x + 15); /* Skip CVMX_CHIP_TYPE */ 394 static inline const char *cvmx_chip_type_to_string(enum 395 cvmx_chip_types_enum type) 396 { 397 switch (type) { 398 ENUM_CHIP_TYPE_CASE(CVMX_CHIP_TYPE_NULL) 399 ENUM_CHIP_TYPE_CASE(CVMX_CHIP_SIM_TYPE_DEPRECATED) 400 ENUM_CHIP_TYPE_CASE(CVMX_CHIP_TYPE_OCTEON_SAMPLE) 401 ENUM_CHIP_TYPE_CASE(CVMX_CHIP_TYPE_MAX) 402 } 403 return "Unsupported Chip"; 404 } 405 406 #endif /* __CVMX_BOOTINFO_H__ */ 407