1 /*
2  * Carsten Langgaard, carstenl@mips.com
3  * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
4  * Copyright (C) 2013 Imagination Technologies Ltd.
5  *
6  *  This program is free software; you can distribute it and/or modify it
7  *  under the terms of the GNU General Public License (Version 2) as
8  *  published by the Free Software Foundation.
9  *
10  *  This program is distributed in the hope it will be useful, but WITHOUT
11  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
13  *  for more details.
14  *
15  *  You should have received a copy of the GNU General Public License along
16  *  with this program; if not, write to the Free Software Foundation, Inc.,
17  *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
18  *
19  * Register definitions for Intel PIIX4 South Bridge Device.
20  */
21 #ifndef __ASM_MIPS_BOARDS_PIIX4_H
22 #define __ASM_MIPS_BOARDS_PIIX4_H
23 
24 /* PIRQX Route Control */
25 #define PIIX4_FUNC0_PIRQRC			0x60
26 #define   PIIX4_FUNC0_PIRQRC_IRQ_ROUTING_DISABLE	(1 << 7)
27 #define   PIIX4_FUNC0_PIRQRC_IRQ_ROUTING_MASK		0xf
28 #define   PIIX4_FUNC0_PIRQRC_IRQ_ROUTING_MAX		16
29 /* Top Of Memory */
30 #define PIIX4_FUNC0_TOM				0x69
31 #define   PIIX4_FUNC0_TOM_TOP_OF_MEMORY_MASK		0xf0
32 /* Deterministic Latency Control */
33 #define PIIX4_FUNC0_DLC				0x82
34 #define   PIIX4_FUNC0_DLC_USBPR_EN			(1 << 2)
35 #define   PIIX4_FUNC0_DLC_PASSIVE_RELEASE_EN		(1 << 1)
36 #define   PIIX4_FUNC0_DLC_DELAYED_TRANSACTION_EN	(1 << 0)
37 
38 /* IDE Timing */
39 #define PIIX4_FUNC1_IDETIM_PRIMARY_LO		0x40
40 #define PIIX4_FUNC1_IDETIM_PRIMARY_HI		0x41
41 #define   PIIX4_FUNC1_IDETIM_PRIMARY_HI_IDE_DECODE_EN	(1 << 7)
42 #define PIIX4_FUNC1_IDETIM_SECONDARY_LO		0x42
43 #define PIIX4_FUNC1_IDETIM_SECONDARY_HI		0x43
44 #define   PIIX4_FUNC1_IDETIM_SECONDARY_HI_IDE_DECODE_EN	(1 << 7)
45 
46 #endif /* __ASM_MIPS_BOARDS_PIIX4_H */
47