1 /*
2  *  Ralink SoC register definitions
3  *
4  *  Copyright (C) 2013 John Crispin <blogic@openwrt.org>
5  *  Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
6  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
7  *
8  *  This program is free software; you can redistribute it and/or modify it
9  *  under the terms of the GNU General Public License version 2 as published
10  *  by the Free Software Foundation.
11  */
12 
13 #ifndef _RALINK_REGS_H_
14 #define _RALINK_REGS_H_
15 
16 extern __iomem void *rt_sysc_membase;
17 extern __iomem void *rt_memc_membase;
18 
19 static inline void rt_sysc_w32(u32 val, unsigned reg)
20 {
21 	__raw_writel(val, rt_sysc_membase + reg);
22 }
23 
24 static inline u32 rt_sysc_r32(unsigned reg)
25 {
26 	return __raw_readl(rt_sysc_membase + reg);
27 }
28 
29 static inline void rt_sysc_m32(u32 clr, u32 set, unsigned reg)
30 {
31 	u32 val = rt_sysc_r32(reg) & ~clr;
32 
33 	__raw_writel(val | set, rt_sysc_membase + reg);
34 }
35 
36 static inline void rt_memc_w32(u32 val, unsigned reg)
37 {
38 	__raw_writel(val, rt_memc_membase + reg);
39 }
40 
41 static inline u32 rt_memc_r32(unsigned reg)
42 {
43 	return __raw_readl(rt_memc_membase + reg);
44 }
45 
46 #endif /* _RALINK_REGS_H_ */
47