130ad29bbSHuacai Chen /* 230ad29bbSHuacai Chen * Copyright (c) 2008 Zhang Le <r0bertz@gentoo.org> 330ad29bbSHuacai Chen * Copyright (c) 2009 Wu Zhangjin <wuzhangjin@gmail.com> 430ad29bbSHuacai Chen * 530ad29bbSHuacai Chen * This program is free software; you can redistribute it 630ad29bbSHuacai Chen * and/or modify it under the terms of the GNU General 730ad29bbSHuacai Chen * Public License as published by the Free Software 830ad29bbSHuacai Chen * Foundation; either version 2 of the License, or (at your 930ad29bbSHuacai Chen * option) any later version. 1030ad29bbSHuacai Chen */ 1130ad29bbSHuacai Chen 1230ad29bbSHuacai Chen #ifndef __ASM_MACH_LOONGSON64_PCI_H_ 1330ad29bbSHuacai Chen #define __ASM_MACH_LOONGSON64_PCI_H_ 1430ad29bbSHuacai Chen 1530ad29bbSHuacai Chen extern struct pci_ops loongson_pci_ops; 1630ad29bbSHuacai Chen 1730ad29bbSHuacai Chen /* this is an offset from mips_io_port_base */ 1830ad29bbSHuacai Chen #define LOONGSON_PCI_IO_START 0x00004000UL 1930ad29bbSHuacai Chen 2030ad29bbSHuacai Chen #ifdef CONFIG_CPU_SUPPORTS_ADDRWINCFG 2130ad29bbSHuacai Chen 2230ad29bbSHuacai Chen /* 2330ad29bbSHuacai Chen * we use address window2 to map cpu address space to pci space 2430ad29bbSHuacai Chen * window2: cpu [1G, 2G] -> pci [1G, 2G] 2530ad29bbSHuacai Chen * why not use window 0 & 1? because they are used by cpu when booting. 2630ad29bbSHuacai Chen * window0: cpu [0, 256M] -> ddr [0, 256M] 2730ad29bbSHuacai Chen * window1: cpu [256M, 512M] -> pci [256M, 512M] 2830ad29bbSHuacai Chen */ 2930ad29bbSHuacai Chen 3030ad29bbSHuacai Chen /* the smallest LOONGSON_CPU_MEM_SRC can be 512M */ 3130ad29bbSHuacai Chen #define LOONGSON_CPU_MEM_SRC 0x40000000ul /* 1G */ 3230ad29bbSHuacai Chen #define LOONGSON_PCI_MEM_DST LOONGSON_CPU_MEM_SRC 3330ad29bbSHuacai Chen 3430ad29bbSHuacai Chen #define LOONGSON_PCI_MEM_START LOONGSON_PCI_MEM_DST 3530ad29bbSHuacai Chen #define LOONGSON_PCI_MEM_END (0x80000000ul-1) /* 2G */ 3630ad29bbSHuacai Chen 3730ad29bbSHuacai Chen #define MMAP_CPUTOPCI_SIZE (LOONGSON_PCI_MEM_END - \ 3830ad29bbSHuacai Chen LOONGSON_PCI_MEM_START + 1) 3930ad29bbSHuacai Chen 4030ad29bbSHuacai Chen #else /* loongson2f/32bit & loongson2e */ 4130ad29bbSHuacai Chen 4230ad29bbSHuacai Chen /* this pci memory space is mapped by pcimap in pci.c */ 4330ad29bbSHuacai Chen #ifdef CONFIG_CPU_LOONGSON3 4430ad29bbSHuacai Chen #define LOONGSON_PCI_MEM_START 0x40000000UL 4530ad29bbSHuacai Chen #define LOONGSON_PCI_MEM_END 0x7effffffUL 4630ad29bbSHuacai Chen #else 4730ad29bbSHuacai Chen #define LOONGSON_PCI_MEM_START LOONGSON_PCILO1_BASE 4830ad29bbSHuacai Chen #define LOONGSON_PCI_MEM_END (LOONGSON_PCILO1_BASE + 0x04000000 * 2) 4930ad29bbSHuacai Chen #endif 5030ad29bbSHuacai Chen /* this is an offset from mips_io_port_base */ 5130ad29bbSHuacai Chen #define LOONGSON_PCI_IO_START 0x00004000UL 5230ad29bbSHuacai Chen 5330ad29bbSHuacai Chen #endif /* !CONFIG_CPU_SUPPORTS_ADDRWINCFG */ 5430ad29bbSHuacai Chen 5530ad29bbSHuacai Chen #endif /* !__ASM_MACH_LOONGSON64_PCI_H_ */ 56