1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Copyright (C) 2009 Lemote, Inc. 4 * Author: Wu Zhangjin <wuzhangjin@gmail.com> 5 */ 6 7 #ifndef __ASM_MACH_LOONGSON64_LOONGSON_H 8 #define __ASM_MACH_LOONGSON64_LOONGSON_H 9 10 #include <linux/io.h> 11 #include <linux/init.h> 12 #include <linux/irq.h> 13 #include <boot_param.h> 14 15 /* machine-specific boot configuration */ 16 struct loongson_system_configuration { 17 u32 nr_cpus; 18 u32 nr_nodes; 19 int cores_per_node; 20 int cores_per_package; 21 u16 boot_cpu_id; 22 u16 reserved_cpus_mask; 23 enum loongson_cpu_type cputype; 24 enum loongson_bridge_type bridgetype; 25 u64 restart_addr; 26 u64 poweroff_addr; 27 u64 suspend_addr; 28 u64 vgabios_addr; 29 u32 dma_mask_bits; 30 u64 workarounds; 31 void (*early_config)(void); 32 }; 33 34 /* machine-specific reboot/halt operation */ 35 extern void mach_prepare_reboot(void); 36 extern void mach_prepare_shutdown(void); 37 38 /* environment arguments from bootloader */ 39 extern u32 cpu_clock_freq; 40 extern u32 memsize, highmemsize; 41 extern const struct plat_smp_ops loongson3_smp_ops; 42 43 /* loongson-specific command line, env and memory initialization */ 44 extern void __init prom_init_env(void); 45 extern void __init szmem(unsigned int node); 46 extern void *loongson_fdt_blob; 47 48 /* irq operation functions */ 49 extern void mach_irq_dispatch(unsigned int pending); 50 extern int mach_i8259_irq(void); 51 52 /* We need this in some places... */ 53 #define delay() ({ \ 54 int x; \ 55 for (x = 0; x < 100000; x++) \ 56 __asm__ __volatile__(""); \ 57 }) 58 59 #define LOONGSON_REG(x) \ 60 (*(volatile u32 *)((char *)CKSEG1ADDR(LOONGSON_REG_BASE) + (x))) 61 62 #define LOONGSON3_REG8(base, x) \ 63 (*(volatile u8 *)((char *)TO_UNCAC(base) + (x))) 64 65 #define LOONGSON3_REG32(base, x) \ 66 (*(volatile u32 *)((char *)TO_UNCAC(base) + (x))) 67 68 #define LOONGSON_FLASH_BASE 0x1c000000 69 #define LOONGSON_FLASH_SIZE 0x02000000 /* 32M */ 70 #define LOONGSON_FLASH_TOP (LOONGSON_FLASH_BASE+LOONGSON_FLASH_SIZE-1) 71 72 #define LOONGSON_LIO0_BASE 0x1e000000 73 #define LOONGSON_LIO0_SIZE 0x01C00000 /* 28M */ 74 #define LOONGSON_LIO0_TOP (LOONGSON_LIO0_BASE+LOONGSON_LIO0_SIZE-1) 75 76 #define LOONGSON_BOOT_BASE 0x1fc00000 77 #define LOONGSON_BOOT_SIZE 0x00100000 /* 1M */ 78 #define LOONGSON_BOOT_TOP (LOONGSON_BOOT_BASE+LOONGSON_BOOT_SIZE-1) 79 #define LOONGSON_REG_BASE 0x1fe00000 80 #define LOONGSON_REG_SIZE 0x00100000 /* 256Bytes + 256Bytes + ??? */ 81 #define LOONGSON_REG_TOP (LOONGSON_REG_BASE+LOONGSON_REG_SIZE-1) 82 /* Loongson-3 specific registers */ 83 #define LOONGSON3_REG_BASE 0x3ff00000 84 #define LOONGSON3_REG_SIZE 0x00100000 /* 256Bytes + 256Bytes + ??? */ 85 #define LOONGSON3_REG_TOP (LOONGSON3_REG_BASE+LOONGSON3_REG_SIZE-1) 86 87 #define LOONGSON_LIO1_BASE 0x1ff00000 88 #define LOONGSON_LIO1_SIZE 0x00100000 /* 1M */ 89 #define LOONGSON_LIO1_TOP (LOONGSON_LIO1_BASE+LOONGSON_LIO1_SIZE-1) 90 91 #define LOONGSON_PCILO0_BASE 0x10000000 92 #define LOONGSON_PCILO1_BASE 0x14000000 93 #define LOONGSON_PCILO2_BASE 0x18000000 94 #define LOONGSON_PCILO_BASE LOONGSON_PCILO0_BASE 95 #define LOONGSON_PCILO_SIZE 0x0c000000 /* 64M * 3 */ 96 #define LOONGSON_PCILO_TOP (LOONGSON_PCILO0_BASE+LOONGSON_PCILO_SIZE-1) 97 98 #define LOONGSON_PCICFG_BASE 0x1fe80000 99 #define LOONGSON_PCICFG_SIZE 0x00000800 /* 2K */ 100 #define LOONGSON_PCICFG_TOP (LOONGSON_PCICFG_BASE+LOONGSON_PCICFG_SIZE-1) 101 102 #define LOONGSON_PCIIO_BASE loongson_sysconf.pci_io_base 103 104 #define LOONGSON_PCIIO_SIZE 0x00100000 /* 1M */ 105 #define LOONGSON_PCIIO_TOP (LOONGSON_PCIIO_BASE+LOONGSON_PCIIO_SIZE-1) 106 107 /* Loongson Register Bases */ 108 109 #define LOONGSON_PCICONFIGBASE 0x00 110 #define LOONGSON_REGBASE 0x100 111 112 /* PCI Configuration Registers */ 113 114 #define LOONGSON_PCI_REG(x) LOONGSON_REG(LOONGSON_PCICONFIGBASE + (x)) 115 #define LOONGSON_PCIDID LOONGSON_PCI_REG(0x00) 116 #define LOONGSON_PCICMD LOONGSON_PCI_REG(0x04) 117 #define LOONGSON_PCICLASS LOONGSON_PCI_REG(0x08) 118 #define LOONGSON_PCILTIMER LOONGSON_PCI_REG(0x0c) 119 #define LOONGSON_PCIBASE0 LOONGSON_PCI_REG(0x10) 120 #define LOONGSON_PCIBASE1 LOONGSON_PCI_REG(0x14) 121 #define LOONGSON_PCIBASE2 LOONGSON_PCI_REG(0x18) 122 #define LOONGSON_PCIBASE3 LOONGSON_PCI_REG(0x1c) 123 #define LOONGSON_PCIBASE4 LOONGSON_PCI_REG(0x20) 124 #define LOONGSON_PCIEXPRBASE LOONGSON_PCI_REG(0x30) 125 #define LOONGSON_PCIINT LOONGSON_PCI_REG(0x3c) 126 127 #define LOONGSON_PCI_ISR4C LOONGSON_PCI_REG(0x4c) 128 129 #define LOONGSON_PCICMD_PERR_CLR 0x80000000 130 #define LOONGSON_PCICMD_SERR_CLR 0x40000000 131 #define LOONGSON_PCICMD_MABORT_CLR 0x20000000 132 #define LOONGSON_PCICMD_MTABORT_CLR 0x10000000 133 #define LOONGSON_PCICMD_TABORT_CLR 0x08000000 134 #define LOONGSON_PCICMD_MPERR_CLR 0x01000000 135 #define LOONGSON_PCICMD_PERRRESPEN 0x00000040 136 #define LOONGSON_PCICMD_ASTEPEN 0x00000080 137 #define LOONGSON_PCICMD_SERREN 0x00000100 138 #define LOONGSON_PCILTIMER_BUSLATENCY 0x0000ff00 139 #define LOONGSON_PCILTIMER_BUSLATENCY_SHIFT 8 140 141 /* Loongson h/w Configuration */ 142 143 #define LOONGSON_GENCFG_OFFSET 0x4 144 #define LOONGSON_GENCFG LOONGSON_REG(LOONGSON_REGBASE + LOONGSON_GENCFG_OFFSET) 145 146 #define LOONGSON_GENCFG_DEBUGMODE 0x00000001 147 #define LOONGSON_GENCFG_SNOOPEN 0x00000002 148 #define LOONGSON_GENCFG_CPUSELFRESET 0x00000004 149 150 #define LOONGSON_GENCFG_FORCE_IRQA 0x00000008 151 #define LOONGSON_GENCFG_IRQA_ISOUT 0x00000010 152 #define LOONGSON_GENCFG_IRQA_FROM_INT1 0x00000020 153 #define LOONGSON_GENCFG_BYTESWAP 0x00000040 154 155 #define LOONGSON_GENCFG_UNCACHED 0x00000080 156 #define LOONGSON_GENCFG_PREFETCHEN 0x00000100 157 #define LOONGSON_GENCFG_WBEHINDEN 0x00000200 158 #define LOONGSON_GENCFG_CACHEALG 0x00000c00 159 #define LOONGSON_GENCFG_CACHEALG_SHIFT 10 160 #define LOONGSON_GENCFG_PCIQUEUE 0x00001000 161 #define LOONGSON_GENCFG_CACHESTOP 0x00002000 162 #define LOONGSON_GENCFG_MSTRBYTESWAP 0x00004000 163 #define LOONGSON_GENCFG_BUSERREN 0x00008000 164 #define LOONGSON_GENCFG_NORETRYTIMEOUT 0x00010000 165 #define LOONGSON_GENCFG_SHORTCOPYTIMEOUT 0x00020000 166 167 /* PCI address map control */ 168 169 #define LOONGSON_PCIMAP LOONGSON_REG(LOONGSON_REGBASE + 0x10) 170 #define LOONGSON_PCIMEMBASECFG LOONGSON_REG(LOONGSON_REGBASE + 0x14) 171 #define LOONGSON_PCIMAP_CFG LOONGSON_REG(LOONGSON_REGBASE + 0x18) 172 173 /* GPIO Regs - r/w */ 174 175 #define LOONGSON_GPIODATA LOONGSON_REG(LOONGSON_REGBASE + 0x1c) 176 #define LOONGSON_GPIOIE LOONGSON_REG(LOONGSON_REGBASE + 0x20) 177 178 /* ICU Configuration Regs - r/w */ 179 180 #define LOONGSON_INTEDGE LOONGSON_REG(LOONGSON_REGBASE + 0x24) 181 #define LOONGSON_INTSTEER LOONGSON_REG(LOONGSON_REGBASE + 0x28) 182 #define LOONGSON_INTPOL LOONGSON_REG(LOONGSON_REGBASE + 0x2c) 183 184 /* ICU Enable Regs - IntEn & IntISR are r/o. */ 185 186 #define LOONGSON_INTENSET LOONGSON_REG(LOONGSON_REGBASE + 0x30) 187 #define LOONGSON_INTENCLR LOONGSON_REG(LOONGSON_REGBASE + 0x34) 188 #define LOONGSON_INTEN LOONGSON_REG(LOONGSON_REGBASE + 0x38) 189 #define LOONGSON_INTISR LOONGSON_REG(LOONGSON_REGBASE + 0x3c) 190 191 /* ICU */ 192 #define LOONGSON_ICU_MBOXES 0x0000000f 193 #define LOONGSON_ICU_MBOXES_SHIFT 0 194 #define LOONGSON_ICU_DMARDY 0x00000010 195 #define LOONGSON_ICU_DMAEMPTY 0x00000020 196 #define LOONGSON_ICU_COPYRDY 0x00000040 197 #define LOONGSON_ICU_COPYEMPTY 0x00000080 198 #define LOONGSON_ICU_COPYERR 0x00000100 199 #define LOONGSON_ICU_PCIIRQ 0x00000200 200 #define LOONGSON_ICU_MASTERERR 0x00000400 201 #define LOONGSON_ICU_SYSTEMERR 0x00000800 202 #define LOONGSON_ICU_DRAMPERR 0x00001000 203 #define LOONGSON_ICU_RETRYERR 0x00002000 204 #define LOONGSON_ICU_GPIOS 0x01ff0000 205 #define LOONGSON_ICU_GPIOS_SHIFT 16 206 #define LOONGSON_ICU_GPINS 0x7e000000 207 #define LOONGSON_ICU_GPINS_SHIFT 25 208 #define LOONGSON_ICU_MBOX(N) (1<<(LOONGSON_ICU_MBOXES_SHIFT+(N))) 209 #define LOONGSON_ICU_GPIO(N) (1<<(LOONGSON_ICU_GPIOS_SHIFT+(N))) 210 #define LOONGSON_ICU_GPIN(N) (1<<(LOONGSON_ICU_GPINS_SHIFT+(N))) 211 212 /* PCI prefetch window base & mask */ 213 214 #define LOONGSON_MEM_WIN_BASE_L LOONGSON_REG(LOONGSON_REGBASE + 0x40) 215 #define LOONGSON_MEM_WIN_BASE_H LOONGSON_REG(LOONGSON_REGBASE + 0x44) 216 #define LOONGSON_MEM_WIN_MASK_L LOONGSON_REG(LOONGSON_REGBASE + 0x48) 217 #define LOONGSON_MEM_WIN_MASK_H LOONGSON_REG(LOONGSON_REGBASE + 0x4c) 218 219 /* PCI_Hit*_Sel_* */ 220 221 #define LOONGSON_PCI_HIT0_SEL_L LOONGSON_REG(LOONGSON_REGBASE + 0x50) 222 #define LOONGSON_PCI_HIT0_SEL_H LOONGSON_REG(LOONGSON_REGBASE + 0x54) 223 #define LOONGSON_PCI_HIT1_SEL_L LOONGSON_REG(LOONGSON_REGBASE + 0x58) 224 #define LOONGSON_PCI_HIT1_SEL_H LOONGSON_REG(LOONGSON_REGBASE + 0x5c) 225 #define LOONGSON_PCI_HIT2_SEL_L LOONGSON_REG(LOONGSON_REGBASE + 0x60) 226 #define LOONGSON_PCI_HIT2_SEL_H LOONGSON_REG(LOONGSON_REGBASE + 0x64) 227 228 /* PXArb Config & Status */ 229 230 #define LOONGSON_PXARB_CFG LOONGSON_REG(LOONGSON_REGBASE + 0x68) 231 #define LOONGSON_PXARB_STATUS LOONGSON_REG(LOONGSON_REGBASE + 0x6c) 232 233 #define MAX_PACKAGES 4 234 235 /* Chip Config registor of each physical cpu package, PRid >= Loongson-2F */ 236 extern u64 loongson_chipcfg[MAX_PACKAGES]; 237 #define LOONGSON_CHIPCFG(id) (*(volatile u32 *)(loongson_chipcfg[id])) 238 239 /* Chip Temperature registor of each physical cpu package, PRid >= Loongson-3A */ 240 extern u64 loongson_chiptemp[MAX_PACKAGES]; 241 #define LOONGSON_CHIPTEMP(id) (*(volatile u32 *)(loongson_chiptemp[id])) 242 243 /* Freq Control register of each physical cpu package, PRid >= Loongson-3B */ 244 extern u64 loongson_freqctrl[MAX_PACKAGES]; 245 #define LOONGSON_FREQCTRL(id) (*(volatile u32 *)(loongson_freqctrl[id])) 246 247 /* pcimap */ 248 249 #define LOONGSON_PCIMAP_PCIMAP_LO0 0x0000003f 250 #define LOONGSON_PCIMAP_PCIMAP_LO0_SHIFT 0 251 #define LOONGSON_PCIMAP_PCIMAP_LO1 0x00000fc0 252 #define LOONGSON_PCIMAP_PCIMAP_LO1_SHIFT 6 253 #define LOONGSON_PCIMAP_PCIMAP_LO2 0x0003f000 254 #define LOONGSON_PCIMAP_PCIMAP_LO2_SHIFT 12 255 #define LOONGSON_PCIMAP_PCIMAP_2 0x00040000 256 #define LOONGSON_PCIMAP_WIN(WIN, ADDR) \ 257 ((((ADDR)>>26) & LOONGSON_PCIMAP_PCIMAP_LO0) << ((WIN)*6)) 258 259 #endif /* __ASM_MACH_LOONGSON64_LOONGSON_H */ 260