12874c5fdSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */
230ad29bbSHuacai Chen /*
330ad29bbSHuacai Chen  * Copyright (C) 2009 Lemote, Inc.
430ad29bbSHuacai Chen  * Author: Wu Zhangjin <wuzhangjin@gmail.com>
530ad29bbSHuacai Chen  */
630ad29bbSHuacai Chen 
730ad29bbSHuacai Chen #ifndef __ASM_MACH_LOONGSON64_LOONGSON_H
830ad29bbSHuacai Chen #define __ASM_MACH_LOONGSON64_LOONGSON_H
930ad29bbSHuacai Chen 
1030ad29bbSHuacai Chen #include <linux/io.h>
1130ad29bbSHuacai Chen #include <linux/init.h>
1230ad29bbSHuacai Chen #include <linux/irq.h>
1330ad29bbSHuacai Chen #include <boot_param.h>
1430ad29bbSHuacai Chen 
1530ad29bbSHuacai Chen 
1630ad29bbSHuacai Chen /* machine-specific reboot/halt operation */
1730ad29bbSHuacai Chen extern void mach_prepare_reboot(void);
1830ad29bbSHuacai Chen extern void mach_prepare_shutdown(void);
1930ad29bbSHuacai Chen 
2030ad29bbSHuacai Chen /* environment arguments from bootloader */
2130ad29bbSHuacai Chen extern u32 cpu_clock_freq;
2230ad29bbSHuacai Chen extern u32 memsize, highmemsize;
23ff2c8252SMatt Redfearn extern const struct plat_smp_ops loongson3_smp_ops;
2430ad29bbSHuacai Chen 
2530ad29bbSHuacai Chen /* loongson-specific command line, env and memory initialization */
2630ad29bbSHuacai Chen extern void __init prom_init_env(void);
27*cf8194e4STiezhu Yang extern void __init szmem(unsigned int node);
28fcecdcd3SJiaxun Yang extern void *loongson_fdt_blob;
2930ad29bbSHuacai Chen 
3030ad29bbSHuacai Chen /* irq operation functions */
3130ad29bbSHuacai Chen extern void mach_irq_dispatch(unsigned int pending);
3230ad29bbSHuacai Chen extern int mach_i8259_irq(void);
3330ad29bbSHuacai Chen 
3430ad29bbSHuacai Chen /* We need this in some places... */
3530ad29bbSHuacai Chen #define delay() ({		\
3630ad29bbSHuacai Chen 	int x;				\
3730ad29bbSHuacai Chen 	for (x = 0; x < 100000; x++)	\
3830ad29bbSHuacai Chen 		__asm__ __volatile__(""); \
3930ad29bbSHuacai Chen })
4030ad29bbSHuacai Chen 
4130ad29bbSHuacai Chen #define LOONGSON_REG(x) \
4230ad29bbSHuacai Chen 	(*(volatile u32 *)((char *)CKSEG1ADDR(LOONGSON_REG_BASE) + (x)))
4330ad29bbSHuacai Chen 
4430ad29bbSHuacai Chen #define LOONGSON3_REG8(base, x) \
4530ad29bbSHuacai Chen 	(*(volatile u8 *)((char *)TO_UNCAC(base) + (x)))
4630ad29bbSHuacai Chen 
4730ad29bbSHuacai Chen #define LOONGSON3_REG32(base, x) \
4830ad29bbSHuacai Chen 	(*(volatile u32 *)((char *)TO_UNCAC(base) + (x)))
4930ad29bbSHuacai Chen 
5030ad29bbSHuacai Chen #define LOONGSON_FLASH_BASE	0x1c000000
5130ad29bbSHuacai Chen #define LOONGSON_FLASH_SIZE	0x02000000	/* 32M */
5230ad29bbSHuacai Chen #define LOONGSON_FLASH_TOP	(LOONGSON_FLASH_BASE+LOONGSON_FLASH_SIZE-1)
5330ad29bbSHuacai Chen 
5430ad29bbSHuacai Chen #define LOONGSON_LIO0_BASE	0x1e000000
5530ad29bbSHuacai Chen #define LOONGSON_LIO0_SIZE	0x01C00000	/* 28M */
5630ad29bbSHuacai Chen #define LOONGSON_LIO0_TOP	(LOONGSON_LIO0_BASE+LOONGSON_LIO0_SIZE-1)
5730ad29bbSHuacai Chen 
5830ad29bbSHuacai Chen #define LOONGSON_BOOT_BASE	0x1fc00000
5930ad29bbSHuacai Chen #define LOONGSON_BOOT_SIZE	0x00100000	/* 1M */
6030ad29bbSHuacai Chen #define LOONGSON_BOOT_TOP	(LOONGSON_BOOT_BASE+LOONGSON_BOOT_SIZE-1)
6130ad29bbSHuacai Chen #define LOONGSON_REG_BASE	0x1fe00000
6230ad29bbSHuacai Chen #define LOONGSON_REG_SIZE	0x00100000	/* 256Bytes + 256Bytes + ??? */
6330ad29bbSHuacai Chen #define LOONGSON_REG_TOP	(LOONGSON_REG_BASE+LOONGSON_REG_SIZE-1)
6430ad29bbSHuacai Chen /* Loongson-3 specific registers */
6530ad29bbSHuacai Chen #define LOONGSON3_REG_BASE	0x3ff00000
6630ad29bbSHuacai Chen #define LOONGSON3_REG_SIZE	0x00100000	/* 256Bytes + 256Bytes + ??? */
6730ad29bbSHuacai Chen #define LOONGSON3_REG_TOP	(LOONGSON3_REG_BASE+LOONGSON3_REG_SIZE-1)
6830ad29bbSHuacai Chen 
6930ad29bbSHuacai Chen #define LOONGSON_LIO1_BASE	0x1ff00000
7030ad29bbSHuacai Chen #define LOONGSON_LIO1_SIZE	0x00100000	/* 1M */
7130ad29bbSHuacai Chen #define LOONGSON_LIO1_TOP	(LOONGSON_LIO1_BASE+LOONGSON_LIO1_SIZE-1)
7230ad29bbSHuacai Chen 
7330ad29bbSHuacai Chen #define LOONGSON_PCILO0_BASE	0x10000000
7430ad29bbSHuacai Chen #define LOONGSON_PCILO1_BASE	0x14000000
7530ad29bbSHuacai Chen #define LOONGSON_PCILO2_BASE	0x18000000
7630ad29bbSHuacai Chen #define LOONGSON_PCILO_BASE	LOONGSON_PCILO0_BASE
7730ad29bbSHuacai Chen #define LOONGSON_PCILO_SIZE	0x0c000000	/* 64M * 3 */
7830ad29bbSHuacai Chen #define LOONGSON_PCILO_TOP	(LOONGSON_PCILO0_BASE+LOONGSON_PCILO_SIZE-1)
7930ad29bbSHuacai Chen 
8030ad29bbSHuacai Chen #define LOONGSON_PCICFG_BASE	0x1fe80000
8130ad29bbSHuacai Chen #define LOONGSON_PCICFG_SIZE	0x00000800	/* 2K */
8230ad29bbSHuacai Chen #define LOONGSON_PCICFG_TOP	(LOONGSON_PCICFG_BASE+LOONGSON_PCICFG_SIZE-1)
8330ad29bbSHuacai Chen 
8430ad29bbSHuacai Chen #define LOONGSON_PCIIO_BASE	loongson_sysconf.pci_io_base
8530ad29bbSHuacai Chen 
8630ad29bbSHuacai Chen #define LOONGSON_PCIIO_SIZE	0x00100000	/* 1M */
8730ad29bbSHuacai Chen #define LOONGSON_PCIIO_TOP	(LOONGSON_PCIIO_BASE+LOONGSON_PCIIO_SIZE-1)
8830ad29bbSHuacai Chen 
8930ad29bbSHuacai Chen /* Loongson Register Bases */
9030ad29bbSHuacai Chen 
9130ad29bbSHuacai Chen #define LOONGSON_PCICONFIGBASE	0x00
9230ad29bbSHuacai Chen #define LOONGSON_REGBASE	0x100
9330ad29bbSHuacai Chen 
9430ad29bbSHuacai Chen /* PCI Configuration Registers */
9530ad29bbSHuacai Chen 
9630ad29bbSHuacai Chen #define LOONGSON_PCI_REG(x)	LOONGSON_REG(LOONGSON_PCICONFIGBASE + (x))
9730ad29bbSHuacai Chen #define LOONGSON_PCIDID		LOONGSON_PCI_REG(0x00)
9830ad29bbSHuacai Chen #define LOONGSON_PCICMD		LOONGSON_PCI_REG(0x04)
9930ad29bbSHuacai Chen #define LOONGSON_PCICLASS	LOONGSON_PCI_REG(0x08)
10030ad29bbSHuacai Chen #define LOONGSON_PCILTIMER	LOONGSON_PCI_REG(0x0c)
10130ad29bbSHuacai Chen #define LOONGSON_PCIBASE0	LOONGSON_PCI_REG(0x10)
10230ad29bbSHuacai Chen #define LOONGSON_PCIBASE1	LOONGSON_PCI_REG(0x14)
10330ad29bbSHuacai Chen #define LOONGSON_PCIBASE2	LOONGSON_PCI_REG(0x18)
10430ad29bbSHuacai Chen #define LOONGSON_PCIBASE3	LOONGSON_PCI_REG(0x1c)
10530ad29bbSHuacai Chen #define LOONGSON_PCIBASE4	LOONGSON_PCI_REG(0x20)
10630ad29bbSHuacai Chen #define LOONGSON_PCIEXPRBASE	LOONGSON_PCI_REG(0x30)
10730ad29bbSHuacai Chen #define LOONGSON_PCIINT		LOONGSON_PCI_REG(0x3c)
10830ad29bbSHuacai Chen 
10930ad29bbSHuacai Chen #define LOONGSON_PCI_ISR4C	LOONGSON_PCI_REG(0x4c)
11030ad29bbSHuacai Chen 
11130ad29bbSHuacai Chen #define LOONGSON_PCICMD_PERR_CLR	0x80000000
11230ad29bbSHuacai Chen #define LOONGSON_PCICMD_SERR_CLR	0x40000000
11330ad29bbSHuacai Chen #define LOONGSON_PCICMD_MABORT_CLR	0x20000000
11430ad29bbSHuacai Chen #define LOONGSON_PCICMD_MTABORT_CLR	0x10000000
11530ad29bbSHuacai Chen #define LOONGSON_PCICMD_TABORT_CLR	0x08000000
11630ad29bbSHuacai Chen #define LOONGSON_PCICMD_MPERR_CLR	0x01000000
11730ad29bbSHuacai Chen #define LOONGSON_PCICMD_PERRRESPEN	0x00000040
11830ad29bbSHuacai Chen #define LOONGSON_PCICMD_ASTEPEN		0x00000080
11930ad29bbSHuacai Chen #define LOONGSON_PCICMD_SERREN		0x00000100
12030ad29bbSHuacai Chen #define LOONGSON_PCILTIMER_BUSLATENCY	0x0000ff00
12130ad29bbSHuacai Chen #define LOONGSON_PCILTIMER_BUSLATENCY_SHIFT	8
12230ad29bbSHuacai Chen 
12330ad29bbSHuacai Chen /* Loongson h/w Configuration */
12430ad29bbSHuacai Chen 
12530ad29bbSHuacai Chen #define LOONGSON_GENCFG_OFFSET		0x4
12630ad29bbSHuacai Chen #define LOONGSON_GENCFG LOONGSON_REG(LOONGSON_REGBASE + LOONGSON_GENCFG_OFFSET)
12730ad29bbSHuacai Chen 
12830ad29bbSHuacai Chen #define LOONGSON_GENCFG_DEBUGMODE	0x00000001
12930ad29bbSHuacai Chen #define LOONGSON_GENCFG_SNOOPEN		0x00000002
13030ad29bbSHuacai Chen #define LOONGSON_GENCFG_CPUSELFRESET	0x00000004
13130ad29bbSHuacai Chen 
13230ad29bbSHuacai Chen #define LOONGSON_GENCFG_FORCE_IRQA	0x00000008
13330ad29bbSHuacai Chen #define LOONGSON_GENCFG_IRQA_ISOUT	0x00000010
13430ad29bbSHuacai Chen #define LOONGSON_GENCFG_IRQA_FROM_INT1	0x00000020
13530ad29bbSHuacai Chen #define LOONGSON_GENCFG_BYTESWAP	0x00000040
13630ad29bbSHuacai Chen 
13730ad29bbSHuacai Chen #define LOONGSON_GENCFG_UNCACHED	0x00000080
13830ad29bbSHuacai Chen #define LOONGSON_GENCFG_PREFETCHEN	0x00000100
13930ad29bbSHuacai Chen #define LOONGSON_GENCFG_WBEHINDEN	0x00000200
14030ad29bbSHuacai Chen #define LOONGSON_GENCFG_CACHEALG	0x00000c00
14130ad29bbSHuacai Chen #define LOONGSON_GENCFG_CACHEALG_SHIFT	10
14230ad29bbSHuacai Chen #define LOONGSON_GENCFG_PCIQUEUE	0x00001000
14330ad29bbSHuacai Chen #define LOONGSON_GENCFG_CACHESTOP	0x00002000
14430ad29bbSHuacai Chen #define LOONGSON_GENCFG_MSTRBYTESWAP	0x00004000
14530ad29bbSHuacai Chen #define LOONGSON_GENCFG_BUSERREN	0x00008000
14630ad29bbSHuacai Chen #define LOONGSON_GENCFG_NORETRYTIMEOUT	0x00010000
14730ad29bbSHuacai Chen #define LOONGSON_GENCFG_SHORTCOPYTIMEOUT	0x00020000
14830ad29bbSHuacai Chen 
14930ad29bbSHuacai Chen /* PCI address map control */
15030ad29bbSHuacai Chen 
15130ad29bbSHuacai Chen #define LOONGSON_PCIMAP			LOONGSON_REG(LOONGSON_REGBASE + 0x10)
15230ad29bbSHuacai Chen #define LOONGSON_PCIMEMBASECFG		LOONGSON_REG(LOONGSON_REGBASE + 0x14)
15330ad29bbSHuacai Chen #define LOONGSON_PCIMAP_CFG		LOONGSON_REG(LOONGSON_REGBASE + 0x18)
15430ad29bbSHuacai Chen 
15530ad29bbSHuacai Chen /* GPIO Regs - r/w */
15630ad29bbSHuacai Chen 
15730ad29bbSHuacai Chen #define LOONGSON_GPIODATA		LOONGSON_REG(LOONGSON_REGBASE + 0x1c)
15830ad29bbSHuacai Chen #define LOONGSON_GPIOIE			LOONGSON_REG(LOONGSON_REGBASE + 0x20)
15930ad29bbSHuacai Chen 
16030ad29bbSHuacai Chen /* ICU Configuration Regs - r/w */
16130ad29bbSHuacai Chen 
16230ad29bbSHuacai Chen #define LOONGSON_INTEDGE		LOONGSON_REG(LOONGSON_REGBASE + 0x24)
16330ad29bbSHuacai Chen #define LOONGSON_INTSTEER		LOONGSON_REG(LOONGSON_REGBASE + 0x28)
16430ad29bbSHuacai Chen #define LOONGSON_INTPOL			LOONGSON_REG(LOONGSON_REGBASE + 0x2c)
16530ad29bbSHuacai Chen 
16630ad29bbSHuacai Chen /* ICU Enable Regs - IntEn & IntISR are r/o. */
16730ad29bbSHuacai Chen 
16830ad29bbSHuacai Chen #define LOONGSON_INTENSET		LOONGSON_REG(LOONGSON_REGBASE + 0x30)
16930ad29bbSHuacai Chen #define LOONGSON_INTENCLR		LOONGSON_REG(LOONGSON_REGBASE + 0x34)
17030ad29bbSHuacai Chen #define LOONGSON_INTEN			LOONGSON_REG(LOONGSON_REGBASE + 0x38)
17130ad29bbSHuacai Chen #define LOONGSON_INTISR			LOONGSON_REG(LOONGSON_REGBASE + 0x3c)
17230ad29bbSHuacai Chen 
17330ad29bbSHuacai Chen /* ICU */
17430ad29bbSHuacai Chen #define LOONGSON_ICU_MBOXES		0x0000000f
17530ad29bbSHuacai Chen #define LOONGSON_ICU_MBOXES_SHIFT	0
17630ad29bbSHuacai Chen #define LOONGSON_ICU_DMARDY		0x00000010
17730ad29bbSHuacai Chen #define LOONGSON_ICU_DMAEMPTY		0x00000020
17830ad29bbSHuacai Chen #define LOONGSON_ICU_COPYRDY		0x00000040
17930ad29bbSHuacai Chen #define LOONGSON_ICU_COPYEMPTY		0x00000080
18030ad29bbSHuacai Chen #define LOONGSON_ICU_COPYERR		0x00000100
18130ad29bbSHuacai Chen #define LOONGSON_ICU_PCIIRQ		0x00000200
18230ad29bbSHuacai Chen #define LOONGSON_ICU_MASTERERR		0x00000400
18330ad29bbSHuacai Chen #define LOONGSON_ICU_SYSTEMERR		0x00000800
18430ad29bbSHuacai Chen #define LOONGSON_ICU_DRAMPERR		0x00001000
18530ad29bbSHuacai Chen #define LOONGSON_ICU_RETRYERR		0x00002000
18630ad29bbSHuacai Chen #define LOONGSON_ICU_GPIOS		0x01ff0000
18730ad29bbSHuacai Chen #define LOONGSON_ICU_GPIOS_SHIFT		16
18830ad29bbSHuacai Chen #define LOONGSON_ICU_GPINS		0x7e000000
18930ad29bbSHuacai Chen #define LOONGSON_ICU_GPINS_SHIFT		25
19030ad29bbSHuacai Chen #define LOONGSON_ICU_MBOX(N)		(1<<(LOONGSON_ICU_MBOXES_SHIFT+(N)))
19130ad29bbSHuacai Chen #define LOONGSON_ICU_GPIO(N)		(1<<(LOONGSON_ICU_GPIOS_SHIFT+(N)))
19230ad29bbSHuacai Chen #define LOONGSON_ICU_GPIN(N)		(1<<(LOONGSON_ICU_GPINS_SHIFT+(N)))
19330ad29bbSHuacai Chen 
19430ad29bbSHuacai Chen /* PCI prefetch window base & mask */
19530ad29bbSHuacai Chen 
19630ad29bbSHuacai Chen #define LOONGSON_MEM_WIN_BASE_L		LOONGSON_REG(LOONGSON_REGBASE + 0x40)
19730ad29bbSHuacai Chen #define LOONGSON_MEM_WIN_BASE_H		LOONGSON_REG(LOONGSON_REGBASE + 0x44)
19830ad29bbSHuacai Chen #define LOONGSON_MEM_WIN_MASK_L		LOONGSON_REG(LOONGSON_REGBASE + 0x48)
19930ad29bbSHuacai Chen #define LOONGSON_MEM_WIN_MASK_H		LOONGSON_REG(LOONGSON_REGBASE + 0x4c)
20030ad29bbSHuacai Chen 
20130ad29bbSHuacai Chen /* PCI_Hit*_Sel_* */
20230ad29bbSHuacai Chen 
20330ad29bbSHuacai Chen #define LOONGSON_PCI_HIT0_SEL_L		LOONGSON_REG(LOONGSON_REGBASE + 0x50)
20430ad29bbSHuacai Chen #define LOONGSON_PCI_HIT0_SEL_H		LOONGSON_REG(LOONGSON_REGBASE + 0x54)
20530ad29bbSHuacai Chen #define LOONGSON_PCI_HIT1_SEL_L		LOONGSON_REG(LOONGSON_REGBASE + 0x58)
20630ad29bbSHuacai Chen #define LOONGSON_PCI_HIT1_SEL_H		LOONGSON_REG(LOONGSON_REGBASE + 0x5c)
20730ad29bbSHuacai Chen #define LOONGSON_PCI_HIT2_SEL_L		LOONGSON_REG(LOONGSON_REGBASE + 0x60)
20830ad29bbSHuacai Chen #define LOONGSON_PCI_HIT2_SEL_H		LOONGSON_REG(LOONGSON_REGBASE + 0x64)
20930ad29bbSHuacai Chen 
21030ad29bbSHuacai Chen /* PXArb Config & Status */
21130ad29bbSHuacai Chen 
21230ad29bbSHuacai Chen #define LOONGSON_PXARB_CFG		LOONGSON_REG(LOONGSON_REGBASE + 0x68)
21330ad29bbSHuacai Chen #define LOONGSON_PXARB_STATUS		LOONGSON_REG(LOONGSON_REGBASE + 0x6c)
21430ad29bbSHuacai Chen 
21530ad29bbSHuacai Chen #define MAX_PACKAGES 4
21630ad29bbSHuacai Chen 
21730ad29bbSHuacai Chen /* Chip Config registor of each physical cpu package, PRid >= Loongson-2F */
21830ad29bbSHuacai Chen extern u64 loongson_chipcfg[MAX_PACKAGES];
21930ad29bbSHuacai Chen #define LOONGSON_CHIPCFG(id) (*(volatile u32 *)(loongson_chipcfg[id]))
22030ad29bbSHuacai Chen 
22130ad29bbSHuacai Chen /* Chip Temperature registor of each physical cpu package, PRid >= Loongson-3A */
22230ad29bbSHuacai Chen extern u64 loongson_chiptemp[MAX_PACKAGES];
22330ad29bbSHuacai Chen #define LOONGSON_CHIPTEMP(id) (*(volatile u32 *)(loongson_chiptemp[id]))
22430ad29bbSHuacai Chen 
22530ad29bbSHuacai Chen /* Freq Control register of each physical cpu package, PRid >= Loongson-3B */
22630ad29bbSHuacai Chen extern u64 loongson_freqctrl[MAX_PACKAGES];
22730ad29bbSHuacai Chen #define LOONGSON_FREQCTRL(id) (*(volatile u32 *)(loongson_freqctrl[id]))
22830ad29bbSHuacai Chen 
22930ad29bbSHuacai Chen /* pcimap */
23030ad29bbSHuacai Chen 
23130ad29bbSHuacai Chen #define LOONGSON_PCIMAP_PCIMAP_LO0	0x0000003f
23230ad29bbSHuacai Chen #define LOONGSON_PCIMAP_PCIMAP_LO0_SHIFT	0
23330ad29bbSHuacai Chen #define LOONGSON_PCIMAP_PCIMAP_LO1	0x00000fc0
23430ad29bbSHuacai Chen #define LOONGSON_PCIMAP_PCIMAP_LO1_SHIFT	6
23530ad29bbSHuacai Chen #define LOONGSON_PCIMAP_PCIMAP_LO2	0x0003f000
23630ad29bbSHuacai Chen #define LOONGSON_PCIMAP_PCIMAP_LO2_SHIFT	12
23730ad29bbSHuacai Chen #define LOONGSON_PCIMAP_PCIMAP_2	0x00040000
23830ad29bbSHuacai Chen #define LOONGSON_PCIMAP_WIN(WIN, ADDR)	\
23930ad29bbSHuacai Chen 	((((ADDR)>>26) & LOONGSON_PCIMAP_PCIMAP_LO0) << ((WIN)*6))
24030ad29bbSHuacai Chen 
24130ad29bbSHuacai Chen #endif /* __ASM_MACH_LOONGSON64_LOONGSON_H */
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