12874c5fdSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */ 230ad29bbSHuacai Chen /* 330ad29bbSHuacai Chen * Copyright (C) 2009 Lemote, Inc. 430ad29bbSHuacai Chen * Author: Wu Zhangjin <wuzhangjin@gmail.com> 530ad29bbSHuacai Chen */ 630ad29bbSHuacai Chen 730ad29bbSHuacai Chen #ifndef __ASM_MACH_LOONGSON64_LOONGSON_H 830ad29bbSHuacai Chen #define __ASM_MACH_LOONGSON64_LOONGSON_H 930ad29bbSHuacai Chen 1030ad29bbSHuacai Chen #include <linux/io.h> 1130ad29bbSHuacai Chen #include <linux/init.h> 1230ad29bbSHuacai Chen #include <linux/irq.h> 1330ad29bbSHuacai Chen #include <boot_param.h> 1430ad29bbSHuacai Chen 1530ad29bbSHuacai Chen /* loongson internal northbridge initialization */ 1630ad29bbSHuacai Chen extern void bonito_irq_init(void); 1730ad29bbSHuacai Chen 1830ad29bbSHuacai Chen /* machine-specific reboot/halt operation */ 1930ad29bbSHuacai Chen extern void mach_prepare_reboot(void); 2030ad29bbSHuacai Chen extern void mach_prepare_shutdown(void); 2130ad29bbSHuacai Chen 2230ad29bbSHuacai Chen /* environment arguments from bootloader */ 2330ad29bbSHuacai Chen extern u32 cpu_clock_freq; 2430ad29bbSHuacai Chen extern u32 memsize, highmemsize; 25ff2c8252SMatt Redfearn extern const struct plat_smp_ops loongson3_smp_ops; 2630ad29bbSHuacai Chen 2730ad29bbSHuacai Chen /* loongson-specific command line, env and memory initialization */ 2830ad29bbSHuacai Chen extern void __init prom_init_memory(void); 2930ad29bbSHuacai Chen extern void __init prom_init_cmdline(void); 3030ad29bbSHuacai Chen extern void __init prom_init_machtype(void); 3130ad29bbSHuacai Chen extern void __init prom_init_env(void); 3230ad29bbSHuacai Chen #ifdef CONFIG_LOONGSON_UART_BASE 3330ad29bbSHuacai Chen extern unsigned long _loongson_uart_base[], loongson_uart_base[]; 3430ad29bbSHuacai Chen extern void prom_init_loongson_uart_base(void); 3530ad29bbSHuacai Chen #endif 3630ad29bbSHuacai Chen 3730ad29bbSHuacai Chen static inline void prom_init_uart_base(void) 3830ad29bbSHuacai Chen { 3930ad29bbSHuacai Chen #ifdef CONFIG_LOONGSON_UART_BASE 4030ad29bbSHuacai Chen prom_init_loongson_uart_base(); 4130ad29bbSHuacai Chen #endif 4230ad29bbSHuacai Chen } 4330ad29bbSHuacai Chen 4430ad29bbSHuacai Chen /* irq operation functions */ 4530ad29bbSHuacai Chen extern void bonito_irqdispatch(void); 4630ad29bbSHuacai Chen extern void __init bonito_irq_init(void); 4730ad29bbSHuacai Chen extern void __init mach_init_irq(void); 4830ad29bbSHuacai Chen extern void mach_irq_dispatch(unsigned int pending); 4930ad29bbSHuacai Chen extern int mach_i8259_irq(void); 5030ad29bbSHuacai Chen 5130ad29bbSHuacai Chen /* We need this in some places... */ 5230ad29bbSHuacai Chen #define delay() ({ \ 5330ad29bbSHuacai Chen int x; \ 5430ad29bbSHuacai Chen for (x = 0; x < 100000; x++) \ 5530ad29bbSHuacai Chen __asm__ __volatile__(""); \ 5630ad29bbSHuacai Chen }) 5730ad29bbSHuacai Chen 5830ad29bbSHuacai Chen #define LOONGSON_REG(x) \ 5930ad29bbSHuacai Chen (*(volatile u32 *)((char *)CKSEG1ADDR(LOONGSON_REG_BASE) + (x))) 6030ad29bbSHuacai Chen 6130ad29bbSHuacai Chen #define LOONGSON3_REG8(base, x) \ 6230ad29bbSHuacai Chen (*(volatile u8 *)((char *)TO_UNCAC(base) + (x))) 6330ad29bbSHuacai Chen 6430ad29bbSHuacai Chen #define LOONGSON3_REG32(base, x) \ 6530ad29bbSHuacai Chen (*(volatile u32 *)((char *)TO_UNCAC(base) + (x))) 6630ad29bbSHuacai Chen 6730ad29bbSHuacai Chen #define LOONGSON_IRQ_BASE 32 6830ad29bbSHuacai Chen #define LOONGSON2_PERFCNT_IRQ (MIPS_CPU_IRQ_BASE + 6) /* cpu perf counter */ 6930ad29bbSHuacai Chen 7030ad29bbSHuacai Chen #include <linux/interrupt.h> 7130ad29bbSHuacai Chen static inline void do_perfcnt_IRQ(void) 7230ad29bbSHuacai Chen { 7330ad29bbSHuacai Chen #if IS_ENABLED(CONFIG_OPROFILE) 7430ad29bbSHuacai Chen do_IRQ(LOONGSON2_PERFCNT_IRQ); 7530ad29bbSHuacai Chen #endif 7630ad29bbSHuacai Chen } 7730ad29bbSHuacai Chen 7830ad29bbSHuacai Chen #define LOONGSON_FLASH_BASE 0x1c000000 7930ad29bbSHuacai Chen #define LOONGSON_FLASH_SIZE 0x02000000 /* 32M */ 8030ad29bbSHuacai Chen #define LOONGSON_FLASH_TOP (LOONGSON_FLASH_BASE+LOONGSON_FLASH_SIZE-1) 8130ad29bbSHuacai Chen 8230ad29bbSHuacai Chen #define LOONGSON_LIO0_BASE 0x1e000000 8330ad29bbSHuacai Chen #define LOONGSON_LIO0_SIZE 0x01C00000 /* 28M */ 8430ad29bbSHuacai Chen #define LOONGSON_LIO0_TOP (LOONGSON_LIO0_BASE+LOONGSON_LIO0_SIZE-1) 8530ad29bbSHuacai Chen 8630ad29bbSHuacai Chen #define LOONGSON_BOOT_BASE 0x1fc00000 8730ad29bbSHuacai Chen #define LOONGSON_BOOT_SIZE 0x00100000 /* 1M */ 8830ad29bbSHuacai Chen #define LOONGSON_BOOT_TOP (LOONGSON_BOOT_BASE+LOONGSON_BOOT_SIZE-1) 8930ad29bbSHuacai Chen #define LOONGSON_REG_BASE 0x1fe00000 9030ad29bbSHuacai Chen #define LOONGSON_REG_SIZE 0x00100000 /* 256Bytes + 256Bytes + ??? */ 9130ad29bbSHuacai Chen #define LOONGSON_REG_TOP (LOONGSON_REG_BASE+LOONGSON_REG_SIZE-1) 9230ad29bbSHuacai Chen /* Loongson-3 specific registers */ 9330ad29bbSHuacai Chen #define LOONGSON3_REG_BASE 0x3ff00000 9430ad29bbSHuacai Chen #define LOONGSON3_REG_SIZE 0x00100000 /* 256Bytes + 256Bytes + ??? */ 9530ad29bbSHuacai Chen #define LOONGSON3_REG_TOP (LOONGSON3_REG_BASE+LOONGSON3_REG_SIZE-1) 9630ad29bbSHuacai Chen 9730ad29bbSHuacai Chen #define LOONGSON_LIO1_BASE 0x1ff00000 9830ad29bbSHuacai Chen #define LOONGSON_LIO1_SIZE 0x00100000 /* 1M */ 9930ad29bbSHuacai Chen #define LOONGSON_LIO1_TOP (LOONGSON_LIO1_BASE+LOONGSON_LIO1_SIZE-1) 10030ad29bbSHuacai Chen 10130ad29bbSHuacai Chen #define LOONGSON_PCILO0_BASE 0x10000000 10230ad29bbSHuacai Chen #define LOONGSON_PCILO1_BASE 0x14000000 10330ad29bbSHuacai Chen #define LOONGSON_PCILO2_BASE 0x18000000 10430ad29bbSHuacai Chen #define LOONGSON_PCILO_BASE LOONGSON_PCILO0_BASE 10530ad29bbSHuacai Chen #define LOONGSON_PCILO_SIZE 0x0c000000 /* 64M * 3 */ 10630ad29bbSHuacai Chen #define LOONGSON_PCILO_TOP (LOONGSON_PCILO0_BASE+LOONGSON_PCILO_SIZE-1) 10730ad29bbSHuacai Chen 10830ad29bbSHuacai Chen #define LOONGSON_PCICFG_BASE 0x1fe80000 10930ad29bbSHuacai Chen #define LOONGSON_PCICFG_SIZE 0x00000800 /* 2K */ 11030ad29bbSHuacai Chen #define LOONGSON_PCICFG_TOP (LOONGSON_PCICFG_BASE+LOONGSON_PCICFG_SIZE-1) 11130ad29bbSHuacai Chen 112437f2b8cSChristoph Hellwig #ifdef CONFIG_CPU_LOONGSON3 11330ad29bbSHuacai Chen #define LOONGSON_PCIIO_BASE loongson_sysconf.pci_io_base 11430ad29bbSHuacai Chen #else 11530ad29bbSHuacai Chen #define LOONGSON_PCIIO_BASE 0x1fd00000 11630ad29bbSHuacai Chen #endif 11730ad29bbSHuacai Chen 11830ad29bbSHuacai Chen #define LOONGSON_PCIIO_SIZE 0x00100000 /* 1M */ 11930ad29bbSHuacai Chen #define LOONGSON_PCIIO_TOP (LOONGSON_PCIIO_BASE+LOONGSON_PCIIO_SIZE-1) 12030ad29bbSHuacai Chen 12130ad29bbSHuacai Chen /* Loongson Register Bases */ 12230ad29bbSHuacai Chen 12330ad29bbSHuacai Chen #define LOONGSON_PCICONFIGBASE 0x00 12430ad29bbSHuacai Chen #define LOONGSON_REGBASE 0x100 12530ad29bbSHuacai Chen 12630ad29bbSHuacai Chen /* PCI Configuration Registers */ 12730ad29bbSHuacai Chen 12830ad29bbSHuacai Chen #define LOONGSON_PCI_REG(x) LOONGSON_REG(LOONGSON_PCICONFIGBASE + (x)) 12930ad29bbSHuacai Chen #define LOONGSON_PCIDID LOONGSON_PCI_REG(0x00) 13030ad29bbSHuacai Chen #define LOONGSON_PCICMD LOONGSON_PCI_REG(0x04) 13130ad29bbSHuacai Chen #define LOONGSON_PCICLASS LOONGSON_PCI_REG(0x08) 13230ad29bbSHuacai Chen #define LOONGSON_PCILTIMER LOONGSON_PCI_REG(0x0c) 13330ad29bbSHuacai Chen #define LOONGSON_PCIBASE0 LOONGSON_PCI_REG(0x10) 13430ad29bbSHuacai Chen #define LOONGSON_PCIBASE1 LOONGSON_PCI_REG(0x14) 13530ad29bbSHuacai Chen #define LOONGSON_PCIBASE2 LOONGSON_PCI_REG(0x18) 13630ad29bbSHuacai Chen #define LOONGSON_PCIBASE3 LOONGSON_PCI_REG(0x1c) 13730ad29bbSHuacai Chen #define LOONGSON_PCIBASE4 LOONGSON_PCI_REG(0x20) 13830ad29bbSHuacai Chen #define LOONGSON_PCIEXPRBASE LOONGSON_PCI_REG(0x30) 13930ad29bbSHuacai Chen #define LOONGSON_PCIINT LOONGSON_PCI_REG(0x3c) 14030ad29bbSHuacai Chen 14130ad29bbSHuacai Chen #define LOONGSON_PCI_ISR4C LOONGSON_PCI_REG(0x4c) 14230ad29bbSHuacai Chen 14330ad29bbSHuacai Chen #define LOONGSON_PCICMD_PERR_CLR 0x80000000 14430ad29bbSHuacai Chen #define LOONGSON_PCICMD_SERR_CLR 0x40000000 14530ad29bbSHuacai Chen #define LOONGSON_PCICMD_MABORT_CLR 0x20000000 14630ad29bbSHuacai Chen #define LOONGSON_PCICMD_MTABORT_CLR 0x10000000 14730ad29bbSHuacai Chen #define LOONGSON_PCICMD_TABORT_CLR 0x08000000 14830ad29bbSHuacai Chen #define LOONGSON_PCICMD_MPERR_CLR 0x01000000 14930ad29bbSHuacai Chen #define LOONGSON_PCICMD_PERRRESPEN 0x00000040 15030ad29bbSHuacai Chen #define LOONGSON_PCICMD_ASTEPEN 0x00000080 15130ad29bbSHuacai Chen #define LOONGSON_PCICMD_SERREN 0x00000100 15230ad29bbSHuacai Chen #define LOONGSON_PCILTIMER_BUSLATENCY 0x0000ff00 15330ad29bbSHuacai Chen #define LOONGSON_PCILTIMER_BUSLATENCY_SHIFT 8 15430ad29bbSHuacai Chen 15530ad29bbSHuacai Chen /* Loongson h/w Configuration */ 15630ad29bbSHuacai Chen 15730ad29bbSHuacai Chen #define LOONGSON_GENCFG_OFFSET 0x4 15830ad29bbSHuacai Chen #define LOONGSON_GENCFG LOONGSON_REG(LOONGSON_REGBASE + LOONGSON_GENCFG_OFFSET) 15930ad29bbSHuacai Chen 16030ad29bbSHuacai Chen #define LOONGSON_GENCFG_DEBUGMODE 0x00000001 16130ad29bbSHuacai Chen #define LOONGSON_GENCFG_SNOOPEN 0x00000002 16230ad29bbSHuacai Chen #define LOONGSON_GENCFG_CPUSELFRESET 0x00000004 16330ad29bbSHuacai Chen 16430ad29bbSHuacai Chen #define LOONGSON_GENCFG_FORCE_IRQA 0x00000008 16530ad29bbSHuacai Chen #define LOONGSON_GENCFG_IRQA_ISOUT 0x00000010 16630ad29bbSHuacai Chen #define LOONGSON_GENCFG_IRQA_FROM_INT1 0x00000020 16730ad29bbSHuacai Chen #define LOONGSON_GENCFG_BYTESWAP 0x00000040 16830ad29bbSHuacai Chen 16930ad29bbSHuacai Chen #define LOONGSON_GENCFG_UNCACHED 0x00000080 17030ad29bbSHuacai Chen #define LOONGSON_GENCFG_PREFETCHEN 0x00000100 17130ad29bbSHuacai Chen #define LOONGSON_GENCFG_WBEHINDEN 0x00000200 17230ad29bbSHuacai Chen #define LOONGSON_GENCFG_CACHEALG 0x00000c00 17330ad29bbSHuacai Chen #define LOONGSON_GENCFG_CACHEALG_SHIFT 10 17430ad29bbSHuacai Chen #define LOONGSON_GENCFG_PCIQUEUE 0x00001000 17530ad29bbSHuacai Chen #define LOONGSON_GENCFG_CACHESTOP 0x00002000 17630ad29bbSHuacai Chen #define LOONGSON_GENCFG_MSTRBYTESWAP 0x00004000 17730ad29bbSHuacai Chen #define LOONGSON_GENCFG_BUSERREN 0x00008000 17830ad29bbSHuacai Chen #define LOONGSON_GENCFG_NORETRYTIMEOUT 0x00010000 17930ad29bbSHuacai Chen #define LOONGSON_GENCFG_SHORTCOPYTIMEOUT 0x00020000 18030ad29bbSHuacai Chen 18130ad29bbSHuacai Chen /* PCI address map control */ 18230ad29bbSHuacai Chen 18330ad29bbSHuacai Chen #define LOONGSON_PCIMAP LOONGSON_REG(LOONGSON_REGBASE + 0x10) 18430ad29bbSHuacai Chen #define LOONGSON_PCIMEMBASECFG LOONGSON_REG(LOONGSON_REGBASE + 0x14) 18530ad29bbSHuacai Chen #define LOONGSON_PCIMAP_CFG LOONGSON_REG(LOONGSON_REGBASE + 0x18) 18630ad29bbSHuacai Chen 18730ad29bbSHuacai Chen /* GPIO Regs - r/w */ 18830ad29bbSHuacai Chen 18930ad29bbSHuacai Chen #define LOONGSON_GPIODATA LOONGSON_REG(LOONGSON_REGBASE + 0x1c) 19030ad29bbSHuacai Chen #define LOONGSON_GPIOIE LOONGSON_REG(LOONGSON_REGBASE + 0x20) 19130ad29bbSHuacai Chen 19230ad29bbSHuacai Chen /* ICU Configuration Regs - r/w */ 19330ad29bbSHuacai Chen 19430ad29bbSHuacai Chen #define LOONGSON_INTEDGE LOONGSON_REG(LOONGSON_REGBASE + 0x24) 19530ad29bbSHuacai Chen #define LOONGSON_INTSTEER LOONGSON_REG(LOONGSON_REGBASE + 0x28) 19630ad29bbSHuacai Chen #define LOONGSON_INTPOL LOONGSON_REG(LOONGSON_REGBASE + 0x2c) 19730ad29bbSHuacai Chen 19830ad29bbSHuacai Chen /* ICU Enable Regs - IntEn & IntISR are r/o. */ 19930ad29bbSHuacai Chen 20030ad29bbSHuacai Chen #define LOONGSON_INTENSET LOONGSON_REG(LOONGSON_REGBASE + 0x30) 20130ad29bbSHuacai Chen #define LOONGSON_INTENCLR LOONGSON_REG(LOONGSON_REGBASE + 0x34) 20230ad29bbSHuacai Chen #define LOONGSON_INTEN LOONGSON_REG(LOONGSON_REGBASE + 0x38) 20330ad29bbSHuacai Chen #define LOONGSON_INTISR LOONGSON_REG(LOONGSON_REGBASE + 0x3c) 20430ad29bbSHuacai Chen 20530ad29bbSHuacai Chen /* ICU */ 20630ad29bbSHuacai Chen #define LOONGSON_ICU_MBOXES 0x0000000f 20730ad29bbSHuacai Chen #define LOONGSON_ICU_MBOXES_SHIFT 0 20830ad29bbSHuacai Chen #define LOONGSON_ICU_DMARDY 0x00000010 20930ad29bbSHuacai Chen #define LOONGSON_ICU_DMAEMPTY 0x00000020 21030ad29bbSHuacai Chen #define LOONGSON_ICU_COPYRDY 0x00000040 21130ad29bbSHuacai Chen #define LOONGSON_ICU_COPYEMPTY 0x00000080 21230ad29bbSHuacai Chen #define LOONGSON_ICU_COPYERR 0x00000100 21330ad29bbSHuacai Chen #define LOONGSON_ICU_PCIIRQ 0x00000200 21430ad29bbSHuacai Chen #define LOONGSON_ICU_MASTERERR 0x00000400 21530ad29bbSHuacai Chen #define LOONGSON_ICU_SYSTEMERR 0x00000800 21630ad29bbSHuacai Chen #define LOONGSON_ICU_DRAMPERR 0x00001000 21730ad29bbSHuacai Chen #define LOONGSON_ICU_RETRYERR 0x00002000 21830ad29bbSHuacai Chen #define LOONGSON_ICU_GPIOS 0x01ff0000 21930ad29bbSHuacai Chen #define LOONGSON_ICU_GPIOS_SHIFT 16 22030ad29bbSHuacai Chen #define LOONGSON_ICU_GPINS 0x7e000000 22130ad29bbSHuacai Chen #define LOONGSON_ICU_GPINS_SHIFT 25 22230ad29bbSHuacai Chen #define LOONGSON_ICU_MBOX(N) (1<<(LOONGSON_ICU_MBOXES_SHIFT+(N))) 22330ad29bbSHuacai Chen #define LOONGSON_ICU_GPIO(N) (1<<(LOONGSON_ICU_GPIOS_SHIFT+(N))) 22430ad29bbSHuacai Chen #define LOONGSON_ICU_GPIN(N) (1<<(LOONGSON_ICU_GPINS_SHIFT+(N))) 22530ad29bbSHuacai Chen 22630ad29bbSHuacai Chen /* PCI prefetch window base & mask */ 22730ad29bbSHuacai Chen 22830ad29bbSHuacai Chen #define LOONGSON_MEM_WIN_BASE_L LOONGSON_REG(LOONGSON_REGBASE + 0x40) 22930ad29bbSHuacai Chen #define LOONGSON_MEM_WIN_BASE_H LOONGSON_REG(LOONGSON_REGBASE + 0x44) 23030ad29bbSHuacai Chen #define LOONGSON_MEM_WIN_MASK_L LOONGSON_REG(LOONGSON_REGBASE + 0x48) 23130ad29bbSHuacai Chen #define LOONGSON_MEM_WIN_MASK_H LOONGSON_REG(LOONGSON_REGBASE + 0x4c) 23230ad29bbSHuacai Chen 23330ad29bbSHuacai Chen /* PCI_Hit*_Sel_* */ 23430ad29bbSHuacai Chen 23530ad29bbSHuacai Chen #define LOONGSON_PCI_HIT0_SEL_L LOONGSON_REG(LOONGSON_REGBASE + 0x50) 23630ad29bbSHuacai Chen #define LOONGSON_PCI_HIT0_SEL_H LOONGSON_REG(LOONGSON_REGBASE + 0x54) 23730ad29bbSHuacai Chen #define LOONGSON_PCI_HIT1_SEL_L LOONGSON_REG(LOONGSON_REGBASE + 0x58) 23830ad29bbSHuacai Chen #define LOONGSON_PCI_HIT1_SEL_H LOONGSON_REG(LOONGSON_REGBASE + 0x5c) 23930ad29bbSHuacai Chen #define LOONGSON_PCI_HIT2_SEL_L LOONGSON_REG(LOONGSON_REGBASE + 0x60) 24030ad29bbSHuacai Chen #define LOONGSON_PCI_HIT2_SEL_H LOONGSON_REG(LOONGSON_REGBASE + 0x64) 24130ad29bbSHuacai Chen 24230ad29bbSHuacai Chen /* PXArb Config & Status */ 24330ad29bbSHuacai Chen 24430ad29bbSHuacai Chen #define LOONGSON_PXARB_CFG LOONGSON_REG(LOONGSON_REGBASE + 0x68) 24530ad29bbSHuacai Chen #define LOONGSON_PXARB_STATUS LOONGSON_REG(LOONGSON_REGBASE + 0x6c) 24630ad29bbSHuacai Chen 24730ad29bbSHuacai Chen #define MAX_PACKAGES 4 24830ad29bbSHuacai Chen 24930ad29bbSHuacai Chen /* Chip Config registor of each physical cpu package, PRid >= Loongson-2F */ 25030ad29bbSHuacai Chen extern u64 loongson_chipcfg[MAX_PACKAGES]; 25130ad29bbSHuacai Chen #define LOONGSON_CHIPCFG(id) (*(volatile u32 *)(loongson_chipcfg[id])) 25230ad29bbSHuacai Chen 25330ad29bbSHuacai Chen /* Chip Temperature registor of each physical cpu package, PRid >= Loongson-3A */ 25430ad29bbSHuacai Chen extern u64 loongson_chiptemp[MAX_PACKAGES]; 25530ad29bbSHuacai Chen #define LOONGSON_CHIPTEMP(id) (*(volatile u32 *)(loongson_chiptemp[id])) 25630ad29bbSHuacai Chen 25730ad29bbSHuacai Chen /* Freq Control register of each physical cpu package, PRid >= Loongson-3B */ 25830ad29bbSHuacai Chen extern u64 loongson_freqctrl[MAX_PACKAGES]; 25930ad29bbSHuacai Chen #define LOONGSON_FREQCTRL(id) (*(volatile u32 *)(loongson_freqctrl[id])) 26030ad29bbSHuacai Chen 26130ad29bbSHuacai Chen /* pcimap */ 26230ad29bbSHuacai Chen 26330ad29bbSHuacai Chen #define LOONGSON_PCIMAP_PCIMAP_LO0 0x0000003f 26430ad29bbSHuacai Chen #define LOONGSON_PCIMAP_PCIMAP_LO0_SHIFT 0 26530ad29bbSHuacai Chen #define LOONGSON_PCIMAP_PCIMAP_LO1 0x00000fc0 26630ad29bbSHuacai Chen #define LOONGSON_PCIMAP_PCIMAP_LO1_SHIFT 6 26730ad29bbSHuacai Chen #define LOONGSON_PCIMAP_PCIMAP_LO2 0x0003f000 26830ad29bbSHuacai Chen #define LOONGSON_PCIMAP_PCIMAP_LO2_SHIFT 12 26930ad29bbSHuacai Chen #define LOONGSON_PCIMAP_PCIMAP_2 0x00040000 27030ad29bbSHuacai Chen #define LOONGSON_PCIMAP_WIN(WIN, ADDR) \ 27130ad29bbSHuacai Chen ((((ADDR)>>26) & LOONGSON_PCIMAP_PCIMAP_LO0) << ((WIN)*6)) 27230ad29bbSHuacai Chen 27330ad29bbSHuacai Chen #ifdef CONFIG_CPU_SUPPORTS_CPUFREQ 27430ad29bbSHuacai Chen #include <linux/cpufreq.h> 27530ad29bbSHuacai Chen extern struct cpufreq_frequency_table loongson2_clockmod_table[]; 27630ad29bbSHuacai Chen #endif 27730ad29bbSHuacai Chen 27830ad29bbSHuacai Chen /* 27930ad29bbSHuacai Chen * address windows configuration module 28030ad29bbSHuacai Chen * 28130ad29bbSHuacai Chen * loongson2e do not have this module 28230ad29bbSHuacai Chen */ 28330ad29bbSHuacai Chen #ifdef CONFIG_CPU_SUPPORTS_ADDRWINCFG 28430ad29bbSHuacai Chen 28530ad29bbSHuacai Chen /* address window config module base address */ 28630ad29bbSHuacai Chen #define LOONGSON_ADDRWINCFG_BASE 0x3ff00000ul 28730ad29bbSHuacai Chen #define LOONGSON_ADDRWINCFG_SIZE 0x180 28830ad29bbSHuacai Chen 28930ad29bbSHuacai Chen extern unsigned long _loongson_addrwincfg_base; 29030ad29bbSHuacai Chen #define LOONGSON_ADDRWINCFG(offset) \ 29130ad29bbSHuacai Chen (*(volatile u64 *)(_loongson_addrwincfg_base + (offset))) 29230ad29bbSHuacai Chen 29330ad29bbSHuacai Chen #define CPU_WIN0_BASE LOONGSON_ADDRWINCFG(0x00) 29430ad29bbSHuacai Chen #define CPU_WIN1_BASE LOONGSON_ADDRWINCFG(0x08) 29530ad29bbSHuacai Chen #define CPU_WIN2_BASE LOONGSON_ADDRWINCFG(0x10) 29630ad29bbSHuacai Chen #define CPU_WIN3_BASE LOONGSON_ADDRWINCFG(0x18) 29730ad29bbSHuacai Chen 29830ad29bbSHuacai Chen #define CPU_WIN0_MASK LOONGSON_ADDRWINCFG(0x20) 29930ad29bbSHuacai Chen #define CPU_WIN1_MASK LOONGSON_ADDRWINCFG(0x28) 30030ad29bbSHuacai Chen #define CPU_WIN2_MASK LOONGSON_ADDRWINCFG(0x30) 30130ad29bbSHuacai Chen #define CPU_WIN3_MASK LOONGSON_ADDRWINCFG(0x38) 30230ad29bbSHuacai Chen 30330ad29bbSHuacai Chen #define CPU_WIN0_MMAP LOONGSON_ADDRWINCFG(0x40) 30430ad29bbSHuacai Chen #define CPU_WIN1_MMAP LOONGSON_ADDRWINCFG(0x48) 30530ad29bbSHuacai Chen #define CPU_WIN2_MMAP LOONGSON_ADDRWINCFG(0x50) 30630ad29bbSHuacai Chen #define CPU_WIN3_MMAP LOONGSON_ADDRWINCFG(0x58) 30730ad29bbSHuacai Chen 30830ad29bbSHuacai Chen #define PCIDMA_WIN0_BASE LOONGSON_ADDRWINCFG(0x60) 30930ad29bbSHuacai Chen #define PCIDMA_WIN1_BASE LOONGSON_ADDRWINCFG(0x68) 31030ad29bbSHuacai Chen #define PCIDMA_WIN2_BASE LOONGSON_ADDRWINCFG(0x70) 31130ad29bbSHuacai Chen #define PCIDMA_WIN3_BASE LOONGSON_ADDRWINCFG(0x78) 31230ad29bbSHuacai Chen 31330ad29bbSHuacai Chen #define PCIDMA_WIN0_MASK LOONGSON_ADDRWINCFG(0x80) 31430ad29bbSHuacai Chen #define PCIDMA_WIN1_MASK LOONGSON_ADDRWINCFG(0x88) 31530ad29bbSHuacai Chen #define PCIDMA_WIN2_MASK LOONGSON_ADDRWINCFG(0x90) 31630ad29bbSHuacai Chen #define PCIDMA_WIN3_MASK LOONGSON_ADDRWINCFG(0x98) 31730ad29bbSHuacai Chen 31830ad29bbSHuacai Chen #define PCIDMA_WIN0_MMAP LOONGSON_ADDRWINCFG(0xa0) 31930ad29bbSHuacai Chen #define PCIDMA_WIN1_MMAP LOONGSON_ADDRWINCFG(0xa8) 32030ad29bbSHuacai Chen #define PCIDMA_WIN2_MMAP LOONGSON_ADDRWINCFG(0xb0) 32130ad29bbSHuacai Chen #define PCIDMA_WIN3_MMAP LOONGSON_ADDRWINCFG(0xb8) 32230ad29bbSHuacai Chen 32330ad29bbSHuacai Chen #define ADDRWIN_WIN0 0 32430ad29bbSHuacai Chen #define ADDRWIN_WIN1 1 32530ad29bbSHuacai Chen #define ADDRWIN_WIN2 2 32630ad29bbSHuacai Chen #define ADDRWIN_WIN3 3 32730ad29bbSHuacai Chen 32830ad29bbSHuacai Chen #define ADDRWIN_MAP_DST_DDR 0 32930ad29bbSHuacai Chen #define ADDRWIN_MAP_DST_PCI 1 33030ad29bbSHuacai Chen #define ADDRWIN_MAP_DST_LIO 1 33130ad29bbSHuacai Chen 33230ad29bbSHuacai Chen /* 33330ad29bbSHuacai Chen * s: CPU, PCIDMA 33430ad29bbSHuacai Chen * d: DDR, PCI, LIO 33530ad29bbSHuacai Chen * win: 0, 1, 2, 3 33630ad29bbSHuacai Chen * src: map source 33730ad29bbSHuacai Chen * dst: map destination 33830ad29bbSHuacai Chen * size: ~mask + 1 33930ad29bbSHuacai Chen */ 34030ad29bbSHuacai Chen #define LOONGSON_ADDRWIN_CFG(s, d, w, src, dst, size) do {\ 34130ad29bbSHuacai Chen s##_WIN##w##_BASE = (src); \ 34230ad29bbSHuacai Chen s##_WIN##w##_MMAP = (dst) | ADDRWIN_MAP_DST_##d; \ 34330ad29bbSHuacai Chen s##_WIN##w##_MASK = ~(size-1); \ 34430ad29bbSHuacai Chen } while (0) 34530ad29bbSHuacai Chen 34630ad29bbSHuacai Chen #define LOONGSON_ADDRWIN_CPUTOPCI(win, src, dst, size) \ 34730ad29bbSHuacai Chen LOONGSON_ADDRWIN_CFG(CPU, PCI, win, src, dst, size) 34830ad29bbSHuacai Chen #define LOONGSON_ADDRWIN_CPUTODDR(win, src, dst, size) \ 34930ad29bbSHuacai Chen LOONGSON_ADDRWIN_CFG(CPU, DDR, win, src, dst, size) 35030ad29bbSHuacai Chen #define LOONGSON_ADDRWIN_PCITODDR(win, src, dst, size) \ 35130ad29bbSHuacai Chen LOONGSON_ADDRWIN_CFG(PCIDMA, DDR, win, src, dst, size) 35230ad29bbSHuacai Chen 35330ad29bbSHuacai Chen #endif /* ! CONFIG_CPU_SUPPORTS_ADDRWINCFG */ 35430ad29bbSHuacai Chen 35530ad29bbSHuacai Chen #endif /* __ASM_MACH_LOONGSON64_LOONGSON_H */ 356