15b3b1688SDavid Daney /* 25b3b1688SDavid Daney * This file is subject to the terms and conditions of the GNU General Public 35b3b1688SDavid Daney * License. See the file "COPYING" in the main directory of this archive 45b3b1688SDavid Daney * for more details. 55b3b1688SDavid Daney * 65b3b1688SDavid Daney * Copyright (C) 2004-2008 Cavium Networks 75b3b1688SDavid Daney */ 85b3b1688SDavid Daney #ifndef __OCTEON_IRQ_H__ 95b3b1688SDavid Daney #define __OCTEON_IRQ_H__ 105b3b1688SDavid Daney 115b3b1688SDavid Daney #define NR_IRQS OCTEON_IRQ_LAST 125b3b1688SDavid Daney #define MIPS_CPU_IRQ_BASE OCTEON_IRQ_SW0 135b3b1688SDavid Daney 140c326387SDavid Daney enum octeon_irq { 150c326387SDavid Daney /* 1 - 8 represent the 8 MIPS standard interrupt sources */ 160c326387SDavid Daney OCTEON_IRQ_SW0 = 1, 170c326387SDavid Daney OCTEON_IRQ_SW1, 180c326387SDavid Daney /* CIU0, CUI2, CIU4 are 3, 4, 5 */ 190c326387SDavid Daney OCTEON_IRQ_5 = 6, 200c326387SDavid Daney OCTEON_IRQ_PERF, 210c326387SDavid Daney OCTEON_IRQ_TIMER, 220c326387SDavid Daney /* sources in CIU_INTX_EN0 */ 230c326387SDavid Daney OCTEON_IRQ_WORKQ0, 249787c56eSDavid Daney OCTEON_IRQ_WDOG0 = OCTEON_IRQ_WORKQ0 + 64, 259787c56eSDavid Daney OCTEON_IRQ_MBOX0 = OCTEON_IRQ_WDOG0 + 32, 260c326387SDavid Daney OCTEON_IRQ_MBOX1, 279787c56eSDavid Daney OCTEON_IRQ_MBOX2, 289787c56eSDavid Daney OCTEON_IRQ_MBOX3, 290c326387SDavid Daney OCTEON_IRQ_PCI_INT0, 300c326387SDavid Daney OCTEON_IRQ_PCI_INT1, 310c326387SDavid Daney OCTEON_IRQ_PCI_INT2, 320c326387SDavid Daney OCTEON_IRQ_PCI_INT3, 330c326387SDavid Daney OCTEON_IRQ_PCI_MSI0, 340c326387SDavid Daney OCTEON_IRQ_PCI_MSI1, 350c326387SDavid Daney OCTEON_IRQ_PCI_MSI2, 360c326387SDavid Daney OCTEON_IRQ_PCI_MSI3, 370c326387SDavid Daney 38a53825efSEunbong Song OCTEON_IRQ_TWSI, 39a53825efSEunbong Song OCTEON_IRQ_TWSI2, 400c326387SDavid Daney OCTEON_IRQ_RML, 410c326387SDavid Daney OCTEON_IRQ_TIMER0, 420c326387SDavid Daney OCTEON_IRQ_TIMER1, 430c326387SDavid Daney OCTEON_IRQ_TIMER2, 440c326387SDavid Daney OCTEON_IRQ_TIMER3, 450c326387SDavid Daney OCTEON_IRQ_USB0, 460c326387SDavid Daney OCTEON_IRQ_USB1, 470b28b823SDavid Daney #ifndef CONFIG_PCI_MSI 480b28b823SDavid Daney OCTEON_IRQ_LAST = 127 490b28b823SDavid Daney #endif 500c326387SDavid Daney }; 515b3b1688SDavid Daney 525b3b1688SDavid Daney #ifdef CONFIG_PCI_MSI 53f5e08284SDavid Daney /* 256 - 511 represent the MSI interrupts 0-255 */ 54f5e08284SDavid Daney #define OCTEON_IRQ_MSI_BIT0 (256) 555b3b1688SDavid Daney 560c326387SDavid Daney #define OCTEON_IRQ_MSI_LAST (OCTEON_IRQ_MSI_BIT0 + 255) 57a5decf70SDavid Daney #define OCTEON_IRQ_LAST (OCTEON_IRQ_MSI_LAST + 1) 585b3b1688SDavid Daney #endif 595b3b1688SDavid Daney 605b3b1688SDavid Daney #endif 61