15b3b1688SDavid Daney /* 25b3b1688SDavid Daney * This file is subject to the terms and conditions of the GNU General Public 35b3b1688SDavid Daney * License. See the file "COPYING" in the main directory of this archive 45b3b1688SDavid Daney * for more details. 55b3b1688SDavid Daney * 65b3b1688SDavid Daney * Copyright (C) 2004-2008 Cavium Networks 75b3b1688SDavid Daney */ 85b3b1688SDavid Daney #ifndef __OCTEON_IRQ_H__ 95b3b1688SDavid Daney #define __OCTEON_IRQ_H__ 105b3b1688SDavid Daney 115b3b1688SDavid Daney #define NR_IRQS OCTEON_IRQ_LAST 125b3b1688SDavid Daney #define MIPS_CPU_IRQ_BASE OCTEON_IRQ_SW0 135b3b1688SDavid Daney 140c326387SDavid Daney enum octeon_irq { 150c326387SDavid Daney /* 1 - 8 represent the 8 MIPS standard interrupt sources */ 160c326387SDavid Daney OCTEON_IRQ_SW0 = 1, 170c326387SDavid Daney OCTEON_IRQ_SW1, 180c326387SDavid Daney /* CIU0, CUI2, CIU4 are 3, 4, 5 */ 190c326387SDavid Daney OCTEON_IRQ_5 = 6, 200c326387SDavid Daney OCTEON_IRQ_PERF, 210c326387SDavid Daney OCTEON_IRQ_TIMER, 220c326387SDavid Daney /* sources in CIU_INTX_EN0 */ 230c326387SDavid Daney OCTEON_IRQ_WORKQ0, 240c326387SDavid Daney OCTEON_IRQ_GPIO0 = OCTEON_IRQ_WORKQ0 + 16, 250c326387SDavid Daney OCTEON_IRQ_WDOG0 = OCTEON_IRQ_GPIO0 + 16, 260c326387SDavid Daney OCTEON_IRQ_WDOG15 = OCTEON_IRQ_WDOG0 + 15, 270c326387SDavid Daney OCTEON_IRQ_MBOX0 = OCTEON_IRQ_WDOG0 + 16, 280c326387SDavid Daney OCTEON_IRQ_MBOX1, 290c326387SDavid Daney OCTEON_IRQ_UART0, 300c326387SDavid Daney OCTEON_IRQ_UART1, 310c326387SDavid Daney OCTEON_IRQ_UART2, 320c326387SDavid Daney OCTEON_IRQ_PCI_INT0, 330c326387SDavid Daney OCTEON_IRQ_PCI_INT1, 340c326387SDavid Daney OCTEON_IRQ_PCI_INT2, 350c326387SDavid Daney OCTEON_IRQ_PCI_INT3, 360c326387SDavid Daney OCTEON_IRQ_PCI_MSI0, 370c326387SDavid Daney OCTEON_IRQ_PCI_MSI1, 380c326387SDavid Daney OCTEON_IRQ_PCI_MSI2, 390c326387SDavid Daney OCTEON_IRQ_PCI_MSI3, 400c326387SDavid Daney 410c326387SDavid Daney OCTEON_IRQ_TWSI, 420c326387SDavid Daney OCTEON_IRQ_TWSI2, 430c326387SDavid Daney OCTEON_IRQ_RML, 440c326387SDavid Daney OCTEON_IRQ_TRACE0, 450c326387SDavid Daney OCTEON_IRQ_GMX_DRP0 = OCTEON_IRQ_TRACE0 + 4, 460c326387SDavid Daney OCTEON_IRQ_IPD_DRP = OCTEON_IRQ_GMX_DRP0 + 5, 470c326387SDavid Daney OCTEON_IRQ_KEY_ZERO, 480c326387SDavid Daney OCTEON_IRQ_TIMER0, 490c326387SDavid Daney OCTEON_IRQ_TIMER1, 500c326387SDavid Daney OCTEON_IRQ_TIMER2, 510c326387SDavid Daney OCTEON_IRQ_TIMER3, 520c326387SDavid Daney OCTEON_IRQ_USB0, 530c326387SDavid Daney OCTEON_IRQ_USB1, 540c326387SDavid Daney OCTEON_IRQ_PCM, 550c326387SDavid Daney OCTEON_IRQ_MPI, 560c326387SDavid Daney OCTEON_IRQ_POWIQ, 570c326387SDavid Daney OCTEON_IRQ_IPDPPTHR, 580c326387SDavid Daney OCTEON_IRQ_MII0, 590c326387SDavid Daney OCTEON_IRQ_MII1, 600c326387SDavid Daney OCTEON_IRQ_BOOTDMA, 610c326387SDavid Daney 620c326387SDavid Daney OCTEON_IRQ_NAND, 630c326387SDavid Daney OCTEON_IRQ_MIO, /* Summary of MIO_BOOT_ERR */ 640c326387SDavid Daney OCTEON_IRQ_IOB, /* Summary of IOB_INT_SUM */ 650c326387SDavid Daney OCTEON_IRQ_FPA, /* Summary of FPA_INT_SUM */ 660c326387SDavid Daney OCTEON_IRQ_POW, /* Summary of POW_ECC_ERR */ 670c326387SDavid Daney OCTEON_IRQ_L2C, /* Summary of L2C_INT_STAT */ 680c326387SDavid Daney OCTEON_IRQ_IPD, /* Summary of IPD_INT_SUM */ 690c326387SDavid Daney OCTEON_IRQ_PIP, /* Summary of PIP_INT_REG */ 700c326387SDavid Daney OCTEON_IRQ_PKO, /* Summary of PKO_REG_ERROR */ 710c326387SDavid Daney OCTEON_IRQ_ZIP, /* Summary of ZIP_ERROR */ 720c326387SDavid Daney OCTEON_IRQ_TIM, /* Summary of TIM_REG_ERROR */ 730c326387SDavid Daney OCTEON_IRQ_RAD, /* Summary of RAD_REG_ERROR */ 740c326387SDavid Daney OCTEON_IRQ_KEY, /* Summary of KEY_INT_SUM */ 750c326387SDavid Daney OCTEON_IRQ_DFA, /* Summary of DFA */ 760c326387SDavid Daney OCTEON_IRQ_USBCTL, /* Summary of USBN0_INT_SUM */ 770c326387SDavid Daney OCTEON_IRQ_SLI, /* Summary of SLI_INT_SUM */ 780c326387SDavid Daney OCTEON_IRQ_DPI, /* Summary of DPI_INT_SUM */ 790c326387SDavid Daney OCTEON_IRQ_AGX0, /* Summary of GMX0*+PCS0_INT*_REG */ 800c326387SDavid Daney OCTEON_IRQ_AGL = OCTEON_IRQ_AGX0 + 5, 810c326387SDavid Daney OCTEON_IRQ_PTP, 820c326387SDavid Daney OCTEON_IRQ_PEM0, 830c326387SDavid Daney OCTEON_IRQ_PEM1, 840c326387SDavid Daney OCTEON_IRQ_SRIO0, 850c326387SDavid Daney OCTEON_IRQ_SRIO1, 860c326387SDavid Daney OCTEON_IRQ_LMC0, 870c326387SDavid Daney OCTEON_IRQ_DFM = OCTEON_IRQ_LMC0 + 4, /* Summary of DFM */ 880c326387SDavid Daney OCTEON_IRQ_RST, 890b28b823SDavid Daney #ifndef CONFIG_PCI_MSI 900b28b823SDavid Daney OCTEON_IRQ_LAST = 127 910b28b823SDavid Daney #endif 920c326387SDavid Daney }; 935b3b1688SDavid Daney 945b3b1688SDavid Daney #ifdef CONFIG_PCI_MSI 950c326387SDavid Daney /* 152 - 407 represent the MSI interrupts 0-255 */ 960c326387SDavid Daney #define OCTEON_IRQ_MSI_BIT0 (OCTEON_IRQ_RST + 1) 975b3b1688SDavid Daney 980c326387SDavid Daney #define OCTEON_IRQ_MSI_LAST (OCTEON_IRQ_MSI_BIT0 + 255) 99a5decf70SDavid Daney #define OCTEON_IRQ_LAST (OCTEON_IRQ_MSI_LAST + 1) 1005b3b1688SDavid Daney #endif 1015b3b1688SDavid Daney 1025b3b1688SDavid Daney #endif 103