1 /*
2  *  Atheros AR71XX/AR724X/AR913X common definitions
3  *
4  *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
5  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6  *
7  *  Parts of this file are based on Atheros' 2.6.15 BSP
8  *
9  *  This program is free software; you can redistribute it and/or modify it
10  *  under the terms of the GNU General Public License version 2 as published
11  *  by the Free Software Foundation.
12  */
13 
14 #ifndef __ASM_MACH_ATH79_H
15 #define __ASM_MACH_ATH79_H
16 
17 #include <linux/types.h>
18 #include <linux/io.h>
19 
20 enum ath79_soc_type {
21 	ATH79_SOC_UNKNOWN,
22 	ATH79_SOC_AR7130,
23 	ATH79_SOC_AR7141,
24 	ATH79_SOC_AR7161,
25 	ATH79_SOC_AR7240,
26 	ATH79_SOC_AR7241,
27 	ATH79_SOC_AR7242,
28 	ATH79_SOC_AR9130,
29 	ATH79_SOC_AR9132,
30 	ATH79_SOC_AR9330,
31 	ATH79_SOC_AR9331,
32 	ATH79_SOC_AR9341,
33 	ATH79_SOC_AR9342,
34 	ATH79_SOC_AR9344,
35 	ATH79_SOC_QCA9556,
36 	ATH79_SOC_QCA9558,
37 };
38 
39 extern enum ath79_soc_type ath79_soc;
40 extern unsigned int ath79_soc_rev;
41 
42 static inline int soc_is_ar71xx(void)
43 {
44 	return (ath79_soc == ATH79_SOC_AR7130 ||
45 		ath79_soc == ATH79_SOC_AR7141 ||
46 		ath79_soc == ATH79_SOC_AR7161);
47 }
48 
49 static inline int soc_is_ar724x(void)
50 {
51 	return (ath79_soc == ATH79_SOC_AR7240 ||
52 		ath79_soc == ATH79_SOC_AR7241 ||
53 		ath79_soc == ATH79_SOC_AR7242);
54 }
55 
56 static inline int soc_is_ar7240(void)
57 {
58 	return (ath79_soc == ATH79_SOC_AR7240);
59 }
60 
61 static inline int soc_is_ar7241(void)
62 {
63 	return (ath79_soc == ATH79_SOC_AR7241);
64 }
65 
66 static inline int soc_is_ar7242(void)
67 {
68 	return (ath79_soc == ATH79_SOC_AR7242);
69 }
70 
71 static inline int soc_is_ar913x(void)
72 {
73 	return (ath79_soc == ATH79_SOC_AR9130 ||
74 		ath79_soc == ATH79_SOC_AR9132);
75 }
76 
77 static inline int soc_is_ar933x(void)
78 {
79 	return (ath79_soc == ATH79_SOC_AR9330 ||
80 		ath79_soc == ATH79_SOC_AR9331);
81 }
82 
83 static inline int soc_is_ar9341(void)
84 {
85 	return (ath79_soc == ATH79_SOC_AR9341);
86 }
87 
88 static inline int soc_is_ar9342(void)
89 {
90 	return (ath79_soc == ATH79_SOC_AR9342);
91 }
92 
93 static inline int soc_is_ar9344(void)
94 {
95 	return (ath79_soc == ATH79_SOC_AR9344);
96 }
97 
98 static inline int soc_is_ar934x(void)
99 {
100 	return soc_is_ar9341() || soc_is_ar9342() || soc_is_ar9344();
101 }
102 
103 static inline int soc_is_qca9556(void)
104 {
105 	return ath79_soc == ATH79_SOC_QCA9556;
106 }
107 
108 static inline int soc_is_qca9558(void)
109 {
110 	return ath79_soc == ATH79_SOC_QCA9558;
111 }
112 
113 static inline int soc_is_qca955x(void)
114 {
115 	return soc_is_qca9556() || soc_is_qca9558();
116 }
117 
118 void ath79_ddr_wb_flush(unsigned int reg);
119 void ath79_ddr_set_pci_windows(void);
120 
121 extern void __iomem *ath79_pll_base;
122 extern void __iomem *ath79_reset_base;
123 
124 static inline void ath79_pll_wr(unsigned reg, u32 val)
125 {
126 	__raw_writel(val, ath79_pll_base + reg);
127 }
128 
129 static inline u32 ath79_pll_rr(unsigned reg)
130 {
131 	return __raw_readl(ath79_pll_base + reg);
132 }
133 
134 static inline void ath79_reset_wr(unsigned reg, u32 val)
135 {
136 	__raw_writel(val, ath79_reset_base + reg);
137 }
138 
139 static inline u32 ath79_reset_rr(unsigned reg)
140 {
141 	return __raw_readl(ath79_reset_base + reg);
142 }
143 
144 void ath79_device_reset_set(u32 mask);
145 void ath79_device_reset_clear(u32 mask);
146 
147 void ath79_cpu_irq_init(unsigned irq_wb_chan2, unsigned irq_wb_chan3);
148 void ath79_misc_irq_init(void __iomem *regs, int irq,
149 			int irq_base, bool is_ar71xx);
150 
151 #endif /* __ASM_MACH_ATH79_H */
152