1 /* 2 * Atheros AR231x/AR531x SoC specific CPU feature overrides 3 * 4 * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org> 5 * 6 * This file was derived from: include/asm-mips/cpu-features.h 7 * Copyright (C) 2003, 2004 Ralf Baechle 8 * Copyright (C) 2004 Maciej W. Rozycki 9 * 10 * This program is free software; you can redistribute it and/or modify it 11 * under the terms of the GNU General Public License version 2 as published 12 * by the Free Software Foundation. 13 * 14 */ 15 #ifndef __ASM_MACH_ATH25_CPU_FEATURE_OVERRIDES_H 16 #define __ASM_MACH_ATH25_CPU_FEATURE_OVERRIDES_H 17 18 /* 19 * The Atheros AR531x/AR231x SoCs have MIPS 4Kc/4KEc core. 20 */ 21 #define cpu_has_tlb 1 22 #define cpu_has_4kex 1 23 #define cpu_has_3k_cache 0 24 #define cpu_has_4k_cache 1 25 #define cpu_has_tx39_cache 0 26 #define cpu_has_sb1_cache 0 27 #define cpu_has_fpu 0 28 #define cpu_has_32fpr 0 29 #define cpu_has_counter 1 30 #define cpu_has_ejtag 1 31 32 #if !defined(CONFIG_SOC_AR5312) 33 # define cpu_has_llsc 1 34 #else 35 /* 36 * The MIPS 4Kc V0.9 core in the AR5312/AR2312 have problems with the 37 * ll/sc instructions. 38 */ 39 # define cpu_has_llsc 0 40 #endif 41 42 #define cpu_has_mips16 0 43 #define cpu_has_mips16e2 0 44 #define cpu_has_mdmx 0 45 #define cpu_has_mips3d 0 46 #define cpu_has_smartmips 0 47 48 #define cpu_has_mips32r1 1 49 50 #if !defined(CONFIG_SOC_AR5312) 51 # define cpu_has_mips32r2 1 52 #endif 53 54 #define cpu_has_mips64r1 0 55 #define cpu_has_mips64r2 0 56 57 #define cpu_has_dsp 0 58 #define cpu_has_mipsmt 0 59 60 #define cpu_has_64bits 0 61 #define cpu_has_64bit_zero_reg 0 62 #define cpu_has_64bit_gp_regs 0 63 #define cpu_has_64bit_addresses 0 64 65 #endif /* __ASM_MACH_ATH25_CPU_FEATURE_OVERRIDES_H */ 66