12874c5fdSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */ 2384740dcSRalf Baechle /* 3384740dcSRalf Baechle * include/asm-mips/irq_cpu.h 4384740dcSRalf Baechle * 5384740dcSRalf Baechle * MIPS CPU interrupt definitions. 6384740dcSRalf Baechle * 7384740dcSRalf Baechle * Copyright (C) 2002 Maciej W. Rozycki 8384740dcSRalf Baechle */ 9384740dcSRalf Baechle #ifndef _ASM_IRQ_CPU_H 10384740dcSRalf Baechle #define _ASM_IRQ_CPU_H 11384740dcSRalf Baechle 12384740dcSRalf Baechle extern void mips_cpu_irq_init(void); 13384740dcSRalf Baechle 140916b469SGabor Juhos #ifdef CONFIG_IRQ_DOMAIN 150916b469SGabor Juhos struct device_node; 16afe8dc25SAndrew Bresticker extern int mips_cpu_irq_of_init(struct device_node *of_node, 170916b469SGabor Juhos struct device_node *parent); 180916b469SGabor Juhos #endif 190916b469SGabor Juhos 20384740dcSRalf Baechle #endif /* _ASM_IRQ_CPU_H */ 21