1 /* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1994 by Waldorf GMBH, written by Ralf Baechle 7 * Copyright (C) 1995, 96, 97, 98, 99, 2000, 01, 02, 03 by Ralf Baechle 8 */ 9 #ifndef _ASM_IRQ_H 10 #define _ASM_IRQ_H 11 12 #include <linux/linkage.h> 13 #include <linux/smp.h> 14 15 #include <asm/mipsmtregs.h> 16 17 #include <irq.h> 18 19 #ifdef CONFIG_I8259 20 static inline int irq_canonicalize(int irq) 21 { 22 return ((irq == I8259A_IRQ_BASE + 2) ? I8259A_IRQ_BASE + 9 : irq); 23 } 24 #else 25 #define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */ 26 #endif 27 28 #ifdef CONFIG_MIPS_MT_SMTC 29 30 struct irqaction; 31 32 extern unsigned long irq_hwmask[]; 33 extern int setup_irq_smtc(unsigned int irq, struct irqaction * new, 34 unsigned long hwmask); 35 36 static inline void smtc_im_ack_irq(unsigned int irq) 37 { 38 if (irq_hwmask[irq] & ST0_IM) 39 set_c0_status(irq_hwmask[irq] & ST0_IM); 40 } 41 42 #else 43 44 static inline void smtc_im_ack_irq(unsigned int irq) 45 { 46 } 47 48 #endif /* CONFIG_MIPS_MT_SMTC */ 49 50 #ifdef CONFIG_MIPS_MT_SMTC_IRQAFF 51 #include <linux/cpumask.h> 52 53 extern int plat_set_irq_affinity(unsigned int irq, 54 const struct cpumask *affinity); 55 extern void smtc_forward_irq(unsigned int irq); 56 57 /* 58 * IRQ affinity hook invoked at the beginning of interrupt dispatch 59 * if option is enabled. 60 * 61 * Up through Linux 2.6.22 (at least) cpumask operations are very 62 * inefficient on MIPS. Initial prototypes of SMTC IRQ affinity 63 * used a "fast path" per-IRQ-descriptor cache of affinity information 64 * to reduce latency. As there is a project afoot to optimize the 65 * cpumask implementations, this version is optimistically assuming 66 * that cpumask.h macro overhead is reasonable during interrupt dispatch. 67 */ 68 #define IRQ_AFFINITY_HOOK(irq) \ 69 do { \ 70 if (!cpumask_test_cpu(smp_processor_id(), irq_desc[irq].affinity)) {\ 71 smtc_forward_irq(irq); \ 72 irq_exit(); \ 73 return; \ 74 } \ 75 } while (0) 76 77 #else /* Not doing SMTC affinity */ 78 79 #define IRQ_AFFINITY_HOOK(irq) do { } while (0) 80 81 #endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */ 82 83 #ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP 84 85 /* 86 * Clear interrupt mask handling "backstop" if irq_hwmask 87 * entry so indicates. This implies that the ack() or end() 88 * functions will take over re-enabling the low-level mask. 89 * Otherwise it will be done on return from exception. 90 */ 91 #define __DO_IRQ_SMTC_HOOK(irq) \ 92 do { \ 93 IRQ_AFFINITY_HOOK(irq); \ 94 if (irq_hwmask[irq] & 0x0000ff00) \ 95 write_c0_tccontext(read_c0_tccontext() & \ 96 ~(irq_hwmask[irq] & 0x0000ff00)); \ 97 } while (0) 98 99 #define __NO_AFFINITY_IRQ_SMTC_HOOK(irq) \ 100 do { \ 101 if (irq_hwmask[irq] & 0x0000ff00) \ 102 write_c0_tccontext(read_c0_tccontext() & \ 103 ~(irq_hwmask[irq] & 0x0000ff00)); \ 104 } while (0) 105 106 #else 107 108 #define __DO_IRQ_SMTC_HOOK(irq) \ 109 do { \ 110 IRQ_AFFINITY_HOOK(irq); \ 111 } while (0) 112 #define __NO_AFFINITY_IRQ_SMTC_HOOK(irq) do { } while (0) 113 114 #endif 115 116 extern void do_IRQ(unsigned int irq); 117 118 #ifdef CONFIG_MIPS_MT_SMTC_IRQAFF 119 120 extern void do_IRQ_no_affinity(unsigned int irq); 121 122 #endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */ 123 124 extern void arch_init_irq(void); 125 extern void spurious_interrupt(void); 126 127 extern int allocate_irqno(void); 128 extern void alloc_legacy_irqno(void); 129 extern void free_irqno(unsigned int irq); 130 131 /* 132 * Before R2 the timer and performance counter interrupts were both fixed to 133 * IE7. Since R2 their number has to be read from the c0_intctl register. 134 */ 135 #define CP0_LEGACY_COMPARE_IRQ 7 136 137 extern int cp0_compare_irq; 138 extern int cp0_compare_irq_shift; 139 extern int cp0_perfcount_irq; 140 141 #endif /* _ASM_IRQ_H */ 142