1 /* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Much of this is taken from binutils and GNU libc ... 7 */ 8 #ifndef _ASM_ELF_H 9 #define _ASM_ELF_H 10 11 #include <linux/auxvec.h> 12 #include <linux/fs.h> 13 #include <uapi/linux/elf.h> 14 15 #include <asm/current.h> 16 17 /* ELF header e_flags defines. */ 18 /* MIPS architecture level. */ 19 #define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */ 20 #define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code. */ 21 #define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code. */ 22 #define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code. */ 23 #define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */ 24 #define EF_MIPS_ARCH_32 0x50000000 /* MIPS32 code. */ 25 #define EF_MIPS_ARCH_64 0x60000000 /* MIPS64 code. */ 26 #define EF_MIPS_ARCH_32R2 0x70000000 /* MIPS32 R2 code. */ 27 #define EF_MIPS_ARCH_64R2 0x80000000 /* MIPS64 R2 code. */ 28 29 /* The ABI of a file. */ 30 #define EF_MIPS_ABI_O32 0x00001000 /* O32 ABI. */ 31 #define EF_MIPS_ABI_O64 0x00002000 /* O32 extended for 64 bit. */ 32 33 #define PT_MIPS_REGINFO 0x70000000 34 #define PT_MIPS_RTPROC 0x70000001 35 #define PT_MIPS_OPTIONS 0x70000002 36 #define PT_MIPS_ABIFLAGS 0x70000003 37 38 /* Flags in the e_flags field of the header */ 39 #define EF_MIPS_NOREORDER 0x00000001 40 #define EF_MIPS_PIC 0x00000002 41 #define EF_MIPS_CPIC 0x00000004 42 #define EF_MIPS_ABI2 0x00000020 43 #define EF_MIPS_OPTIONS_FIRST 0x00000080 44 #define EF_MIPS_32BITMODE 0x00000100 45 #define EF_MIPS_FP64 0x00000200 46 #define EF_MIPS_NAN2008 0x00000400 47 #define EF_MIPS_ABI 0x0000f000 48 #define EF_MIPS_ARCH 0xf0000000 49 50 #define DT_MIPS_RLD_VERSION 0x70000001 51 #define DT_MIPS_TIME_STAMP 0x70000002 52 #define DT_MIPS_ICHECKSUM 0x70000003 53 #define DT_MIPS_IVERSION 0x70000004 54 #define DT_MIPS_FLAGS 0x70000005 55 #define RHF_NONE 0x00000000 56 #define RHF_HARDWAY 0x00000001 57 #define RHF_NOTPOT 0x00000002 58 #define RHF_SGI_ONLY 0x00000010 59 #define DT_MIPS_BASE_ADDRESS 0x70000006 60 #define DT_MIPS_CONFLICT 0x70000008 61 #define DT_MIPS_LIBLIST 0x70000009 62 #define DT_MIPS_LOCAL_GOTNO 0x7000000a 63 #define DT_MIPS_CONFLICTNO 0x7000000b 64 #define DT_MIPS_LIBLISTNO 0x70000010 65 #define DT_MIPS_SYMTABNO 0x70000011 66 #define DT_MIPS_UNREFEXTNO 0x70000012 67 #define DT_MIPS_GOTSYM 0x70000013 68 #define DT_MIPS_HIPAGENO 0x70000014 69 #define DT_MIPS_RLD_MAP 0x70000016 70 71 #define R_MIPS_NONE 0 72 #define R_MIPS_16 1 73 #define R_MIPS_32 2 74 #define R_MIPS_REL32 3 75 #define R_MIPS_26 4 76 #define R_MIPS_HI16 5 77 #define R_MIPS_LO16 6 78 #define R_MIPS_GPREL16 7 79 #define R_MIPS_LITERAL 8 80 #define R_MIPS_GOT16 9 81 #define R_MIPS_PC16 10 82 #define R_MIPS_CALL16 11 83 #define R_MIPS_GPREL32 12 84 /* The remaining relocs are defined on Irix, although they are not 85 in the MIPS ELF ABI. */ 86 #define R_MIPS_UNUSED1 13 87 #define R_MIPS_UNUSED2 14 88 #define R_MIPS_UNUSED3 15 89 #define R_MIPS_SHIFT5 16 90 #define R_MIPS_SHIFT6 17 91 #define R_MIPS_64 18 92 #define R_MIPS_GOT_DISP 19 93 #define R_MIPS_GOT_PAGE 20 94 #define R_MIPS_GOT_OFST 21 95 /* 96 * The following two relocation types are specified in the MIPS ABI 97 * conformance guide version 1.2 but not yet in the psABI. 98 */ 99 #define R_MIPS_GOTHI16 22 100 #define R_MIPS_GOTLO16 23 101 #define R_MIPS_SUB 24 102 #define R_MIPS_INSERT_A 25 103 #define R_MIPS_INSERT_B 26 104 #define R_MIPS_DELETE 27 105 #define R_MIPS_HIGHER 28 106 #define R_MIPS_HIGHEST 29 107 /* 108 * The following two relocation types are specified in the MIPS ABI 109 * conformance guide version 1.2 but not yet in the psABI. 110 */ 111 #define R_MIPS_CALLHI16 30 112 #define R_MIPS_CALLLO16 31 113 /* 114 * Introduced for MIPSr6. 115 */ 116 #define R_MIPS_PC21_S2 60 117 #define R_MIPS_PC26_S2 61 118 /* 119 * This range is reserved for vendor specific relocations. 120 */ 121 #define R_MIPS_LOVENDOR 100 122 #define R_MIPS_HIVENDOR 127 123 124 #define SHN_MIPS_ACCOMON 0xff00 /* Allocated common symbols */ 125 #define SHN_MIPS_TEXT 0xff01 /* Allocated test symbols. */ 126 #define SHN_MIPS_DATA 0xff02 /* Allocated data symbols. */ 127 #define SHN_MIPS_SCOMMON 0xff03 /* Small common symbols */ 128 #define SHN_MIPS_SUNDEFINED 0xff04 /* Small undefined symbols */ 129 130 #define SHT_MIPS_LIST 0x70000000 131 #define SHT_MIPS_CONFLICT 0x70000002 132 #define SHT_MIPS_GPTAB 0x70000003 133 #define SHT_MIPS_UCODE 0x70000004 134 #define SHT_MIPS_DEBUG 0x70000005 135 #define SHT_MIPS_REGINFO 0x70000006 136 #define SHT_MIPS_PACKAGE 0x70000007 137 #define SHT_MIPS_PACKSYM 0x70000008 138 #define SHT_MIPS_RELD 0x70000009 139 #define SHT_MIPS_IFACE 0x7000000b 140 #define SHT_MIPS_CONTENT 0x7000000c 141 #define SHT_MIPS_OPTIONS 0x7000000d 142 #define SHT_MIPS_SHDR 0x70000010 143 #define SHT_MIPS_FDESC 0x70000011 144 #define SHT_MIPS_EXTSYM 0x70000012 145 #define SHT_MIPS_DENSE 0x70000013 146 #define SHT_MIPS_PDESC 0x70000014 147 #define SHT_MIPS_LOCSYM 0x70000015 148 #define SHT_MIPS_AUXSYM 0x70000016 149 #define SHT_MIPS_OPTSYM 0x70000017 150 #define SHT_MIPS_LOCSTR 0x70000018 151 #define SHT_MIPS_LINE 0x70000019 152 #define SHT_MIPS_RFDESC 0x7000001a 153 #define SHT_MIPS_DELTASYM 0x7000001b 154 #define SHT_MIPS_DELTAINST 0x7000001c 155 #define SHT_MIPS_DELTACLASS 0x7000001d 156 #define SHT_MIPS_DWARF 0x7000001e 157 #define SHT_MIPS_DELTADECL 0x7000001f 158 #define SHT_MIPS_SYMBOL_LIB 0x70000020 159 #define SHT_MIPS_EVENTS 0x70000021 160 #define SHT_MIPS_TRANSLATE 0x70000022 161 #define SHT_MIPS_PIXIE 0x70000023 162 #define SHT_MIPS_XLATE 0x70000024 163 #define SHT_MIPS_XLATE_DEBUG 0x70000025 164 #define SHT_MIPS_WHIRL 0x70000026 165 #define SHT_MIPS_EH_REGION 0x70000027 166 #define SHT_MIPS_XLATE_OLD 0x70000028 167 #define SHT_MIPS_PDR_EXCEPTION 0x70000029 168 169 #define SHF_MIPS_GPREL 0x10000000 170 #define SHF_MIPS_MERGE 0x20000000 171 #define SHF_MIPS_ADDR 0x40000000 172 #define SHF_MIPS_STRING 0x80000000 173 #define SHF_MIPS_NOSTRIP 0x08000000 174 #define SHF_MIPS_LOCAL 0x04000000 175 #define SHF_MIPS_NAMES 0x02000000 176 #define SHF_MIPS_NODUPES 0x01000000 177 178 #define MIPS_ABI_FP_ANY 0 /* FP ABI doesn't matter */ 179 #define MIPS_ABI_FP_DOUBLE 1 /* -mdouble-float */ 180 #define MIPS_ABI_FP_SINGLE 2 /* -msingle-float */ 181 #define MIPS_ABI_FP_SOFT 3 /* -msoft-float */ 182 #define MIPS_ABI_FP_OLD_64 4 /* -mips32r2 -mfp64 */ 183 #define MIPS_ABI_FP_XX 5 /* -mfpxx */ 184 #define MIPS_ABI_FP_64 6 /* -mips32r2 -mfp64 */ 185 #define MIPS_ABI_FP_64A 7 /* -mips32r2 -mfp64 -mno-odd-spreg */ 186 187 struct mips_elf_abiflags_v0 { 188 uint16_t version; /* Version of flags structure */ 189 uint8_t isa_level; /* The level of the ISA: 1-5, 32, 64 */ 190 uint8_t isa_rev; /* The revision of ISA: 0 for MIPS V and below, 191 1-n otherwise */ 192 uint8_t gpr_size; /* The size of general purpose registers */ 193 uint8_t cpr1_size; /* The size of co-processor 1 registers */ 194 uint8_t cpr2_size; /* The size of co-processor 2 registers */ 195 uint8_t fp_abi; /* The floating-point ABI */ 196 uint32_t isa_ext; /* Mask of processor-specific extensions */ 197 uint32_t ases; /* Mask of ASEs used */ 198 uint32_t flags1; /* Mask of general flags */ 199 uint32_t flags2; 200 }; 201 202 #ifndef ELF_ARCH 203 /* ELF register definitions */ 204 #define ELF_NGREG 45 205 #define ELF_NFPREG 33 206 207 typedef unsigned long elf_greg_t; 208 typedef elf_greg_t elf_gregset_t[ELF_NGREG]; 209 210 typedef double elf_fpreg_t; 211 typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; 212 213 #ifdef CONFIG_32BIT 214 /* 215 * This is used to ensure we don't load something for the wrong architecture. 216 */ 217 #define elf_check_arch elfo32_check_arch 218 219 /* 220 * These are used to set parameters in the core dumps. 221 */ 222 #define ELF_CLASS ELFCLASS32 223 224 #endif /* CONFIG_32BIT */ 225 226 #ifdef CONFIG_64BIT 227 /* 228 * This is used to ensure we don't load something for the wrong architecture. 229 */ 230 #define elf_check_arch elfn64_check_arch 231 232 /* 233 * These are used to set parameters in the core dumps. 234 */ 235 #define ELF_CLASS ELFCLASS64 236 237 #endif /* CONFIG_64BIT */ 238 239 /* 240 * These are used to set parameters in the core dumps. 241 */ 242 #ifdef __MIPSEB__ 243 #define ELF_DATA ELFDATA2MSB 244 #elif defined(__MIPSEL__) 245 #define ELF_DATA ELFDATA2LSB 246 #endif 247 #define ELF_ARCH EM_MIPS 248 249 #endif /* !defined(ELF_ARCH) */ 250 251 /* 252 * In order to be sure that we don't attempt to execute an O32 binary which 253 * requires 64 bit FP (FR=1) on a system which does not support it we refuse 254 * to execute any binary which has bits specified by the following macro set 255 * in its ELF header flags. 256 */ 257 #ifdef CONFIG_MIPS_O32_FP64_SUPPORT 258 # define __MIPS_O32_FP64_MUST_BE_ZERO 0 259 #else 260 # define __MIPS_O32_FP64_MUST_BE_ZERO EF_MIPS_FP64 261 #endif 262 263 #define mips_elf_check_machine(x) ((x)->e_machine == EM_MIPS) 264 265 #define vmcore_elf32_check_arch mips_elf_check_machine 266 #define vmcore_elf64_check_arch mips_elf_check_machine 267 268 /* 269 * Return non-zero if HDR identifies an o32 ELF binary. 270 */ 271 #define elfo32_check_arch(hdr) \ 272 ({ \ 273 int __res = 1; \ 274 struct elfhdr *__h = (hdr); \ 275 \ 276 if (!mips_elf_check_machine(__h)) \ 277 __res = 0; \ 278 if (__h->e_ident[EI_CLASS] != ELFCLASS32) \ 279 __res = 0; \ 280 if ((__h->e_flags & EF_MIPS_ABI2) != 0) \ 281 __res = 0; \ 282 if (((__h->e_flags & EF_MIPS_ABI) != 0) && \ 283 ((__h->e_flags & EF_MIPS_ABI) != EF_MIPS_ABI_O32)) \ 284 __res = 0; \ 285 if (__h->e_flags & __MIPS_O32_FP64_MUST_BE_ZERO) \ 286 __res = 0; \ 287 \ 288 __res; \ 289 }) 290 291 /* 292 * Return non-zero if HDR identifies an n64 ELF binary. 293 */ 294 #define elfn64_check_arch(hdr) \ 295 ({ \ 296 int __res = 1; \ 297 struct elfhdr *__h = (hdr); \ 298 \ 299 if (!mips_elf_check_machine(__h)) \ 300 __res = 0; \ 301 if (__h->e_ident[EI_CLASS] != ELFCLASS64) \ 302 __res = 0; \ 303 \ 304 __res; \ 305 }) 306 307 /* 308 * Return non-zero if HDR identifies an n32 ELF binary. 309 */ 310 #define elfn32_check_arch(hdr) \ 311 ({ \ 312 int __res = 1; \ 313 struct elfhdr *__h = (hdr); \ 314 \ 315 if (!mips_elf_check_machine(__h)) \ 316 __res = 0; \ 317 if (__h->e_ident[EI_CLASS] != ELFCLASS32) \ 318 __res = 0; \ 319 if (((__h->e_flags & EF_MIPS_ABI2) == 0) || \ 320 ((__h->e_flags & EF_MIPS_ABI) != 0)) \ 321 __res = 0; \ 322 \ 323 __res; \ 324 }) 325 326 struct mips_abi; 327 328 extern struct mips_abi mips_abi; 329 extern struct mips_abi mips_abi_32; 330 extern struct mips_abi mips_abi_n32; 331 332 #ifdef CONFIG_32BIT 333 334 #define SET_PERSONALITY2(ex, state) \ 335 do { \ 336 clear_thread_flag(TIF_HYBRID_FPREGS); \ 337 set_thread_flag(TIF_32BIT_FPREGS); \ 338 \ 339 current->thread.abi = &mips_abi; \ 340 \ 341 mips_set_personality_fp(state); \ 342 mips_set_personality_nan(state); \ 343 \ 344 if (personality(current->personality) != PER_LINUX) \ 345 set_personality(PER_LINUX); \ 346 } while (0) 347 348 #endif /* CONFIG_32BIT */ 349 350 #ifdef CONFIG_64BIT 351 352 #ifdef CONFIG_MIPS32_N32 353 #define __SET_PERSONALITY32_N32() \ 354 do { \ 355 set_thread_flag(TIF_32BIT_ADDR); \ 356 \ 357 current->thread.abi = &mips_abi_n32; \ 358 } while (0) 359 #else 360 #define __SET_PERSONALITY32_N32() \ 361 do { } while (0) 362 #endif 363 364 #ifdef CONFIG_MIPS32_O32 365 #define __SET_PERSONALITY32_O32(ex, state) \ 366 do { \ 367 set_thread_flag(TIF_32BIT_REGS); \ 368 set_thread_flag(TIF_32BIT_ADDR); \ 369 clear_thread_flag(TIF_HYBRID_FPREGS); \ 370 set_thread_flag(TIF_32BIT_FPREGS); \ 371 \ 372 current->thread.abi = &mips_abi_32; \ 373 \ 374 mips_set_personality_fp(state); \ 375 } while (0) 376 #else 377 #define __SET_PERSONALITY32_O32(ex, state) \ 378 do { } while (0) 379 #endif 380 381 #ifdef CONFIG_MIPS32_COMPAT 382 #define __SET_PERSONALITY32(ex, state) \ 383 do { \ 384 if ((((ex).e_flags & EF_MIPS_ABI2) != 0) && \ 385 ((ex).e_flags & EF_MIPS_ABI) == 0) \ 386 __SET_PERSONALITY32_N32(); \ 387 else \ 388 __SET_PERSONALITY32_O32(ex, state); \ 389 } while (0) 390 #else 391 #define __SET_PERSONALITY32(ex, state) do { } while (0) 392 #endif 393 394 #define SET_PERSONALITY2(ex, state) \ 395 do { \ 396 unsigned int p; \ 397 \ 398 clear_thread_flag(TIF_32BIT_REGS); \ 399 clear_thread_flag(TIF_32BIT_FPREGS); \ 400 clear_thread_flag(TIF_HYBRID_FPREGS); \ 401 clear_thread_flag(TIF_32BIT_ADDR); \ 402 \ 403 if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \ 404 __SET_PERSONALITY32(ex, state); \ 405 else \ 406 current->thread.abi = &mips_abi; \ 407 \ 408 mips_set_personality_nan(state); \ 409 \ 410 p = personality(current->personality); \ 411 if (p != PER_LINUX32 && p != PER_LINUX) \ 412 set_personality(PER_LINUX); \ 413 } while (0) 414 415 #endif /* CONFIG_64BIT */ 416 417 #define CORE_DUMP_USE_REGSET 418 #define ELF_EXEC_PAGESIZE PAGE_SIZE 419 420 /* This yields a mask that user programs can use to figure out what 421 instruction set this cpu supports. This could be done in userspace, 422 but it's not easy, and we've already done it here. */ 423 424 #define ELF_HWCAP (elf_hwcap) 425 extern unsigned int elf_hwcap; 426 #include <asm/hwcap.h> 427 428 /* 429 * This yields a string that ld.so will use to load implementation 430 * specific libraries for optimization. This is more specific in 431 * intent than poking at uname or /proc/cpuinfo. 432 */ 433 434 #define ELF_PLATFORM __elf_platform 435 extern const char *__elf_platform; 436 437 /* 438 * See comments in asm-alpha/elf.h, this is the same thing 439 * on the MIPS. 440 */ 441 #define ELF_PLAT_INIT(_r, load_addr) do { \ 442 _r->regs[1] = _r->regs[2] = _r->regs[3] = _r->regs[4] = 0; \ 443 _r->regs[5] = _r->regs[6] = _r->regs[7] = _r->regs[8] = 0; \ 444 _r->regs[9] = _r->regs[10] = _r->regs[11] = _r->regs[12] = 0; \ 445 _r->regs[13] = _r->regs[14] = _r->regs[15] = _r->regs[16] = 0; \ 446 _r->regs[17] = _r->regs[18] = _r->regs[19] = _r->regs[20] = 0; \ 447 _r->regs[21] = _r->regs[22] = _r->regs[23] = _r->regs[24] = 0; \ 448 _r->regs[25] = _r->regs[26] = _r->regs[27] = _r->regs[28] = 0; \ 449 _r->regs[30] = _r->regs[31] = 0; \ 450 } while (0) 451 452 /* This is the location that an ET_DYN program is loaded if exec'ed. Typical 453 use of this is to invoke "./ld.so someprog" to test out a new version of 454 the loader. We need to make sure that it is out of the way of the program 455 that it will "exec", and that there is sufficient room for the brk. */ 456 457 #ifndef ELF_ET_DYN_BASE 458 #define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2) 459 #endif 460 461 /* update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes */ 462 #define ARCH_DLINFO \ 463 do { \ 464 NEW_AUX_ENT(AT_SYSINFO_EHDR, \ 465 (unsigned long)current->mm->context.vdso); \ 466 } while (0) 467 468 #define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1 469 struct linux_binprm; 470 extern int arch_setup_additional_pages(struct linux_binprm *bprm, 471 int uses_interp); 472 473 struct arch_elf_state { 474 int nan_2008; 475 int fp_abi; 476 int interp_fp_abi; 477 int overall_fp_mode; 478 }; 479 480 #define MIPS_ABI_FP_UNKNOWN (-1) /* Unknown FP ABI (kernel internal) */ 481 482 #define INIT_ARCH_ELF_STATE { \ 483 .nan_2008 = -1, \ 484 .fp_abi = MIPS_ABI_FP_UNKNOWN, \ 485 .interp_fp_abi = MIPS_ABI_FP_UNKNOWN, \ 486 .overall_fp_mode = -1, \ 487 } 488 489 /* Whether to accept legacy-NaN and 2008-NaN user binaries. */ 490 extern bool mips_use_nan_legacy; 491 extern bool mips_use_nan_2008; 492 493 extern int arch_elf_pt_proc(void *ehdr, void *phdr, struct file *elf, 494 bool is_interp, struct arch_elf_state *state); 495 496 extern int arch_check_elf(void *ehdr, bool has_interpreter, void *interp_ehdr, 497 struct arch_elf_state *state); 498 499 extern void mips_set_personality_nan(struct arch_elf_state *state); 500 extern void mips_set_personality_fp(struct arch_elf_state *state); 501 502 #define elf_read_implies_exec(ex, stk) mips_elf_read_implies_exec(&(ex), stk) 503 extern int mips_elf_read_implies_exec(void *elf_ex, int exstack); 504 505 #endif /* _ASM_ELF_H */ 506