xref: /openbmc/linux/arch/mips/include/asm/dec/kn02ca.h (revision 9ac8d3fb)
1 /*
2  *	include/asm-mips/dec/kn02ca.h
3  *
4  *	Personal DECstation 5000/xx (Maxine or KN02-CA) definitions.
5  *
6  *	Copyright (C) 2002, 2003  Maciej W. Rozycki
7  *
8  *	This program is free software; you can redistribute it and/or
9  *	modify it under the terms of the GNU General Public License
10  *	as published by the Free Software Foundation; either version
11  *	2 of the License, or (at your option) any later version.
12  */
13 #ifndef __ASM_MIPS_DEC_KN02CA_H
14 #define __ASM_MIPS_DEC_KN02CA_H
15 
16 #include <asm/dec/kn02xa.h>		/* For common definitions. */
17 
18 /*
19  * CPU interrupt bits.
20  */
21 #define KN02CA_CPU_INR_HALT	6	/* HALT from ACCESS.Bus */
22 #define KN02CA_CPU_INR_CASCADE	5	/* I/O ASIC cascade */
23 #define KN02CA_CPU_INR_BUS	4	/* memory, I/O bus read/write errors */
24 #define KN02CA_CPU_INR_RTC	3	/* DS1287 RTC */
25 #define KN02CA_CPU_INR_TIMER	2	/* ARC periodic timer */
26 
27 /*
28  * I/O ASIC interrupt bits.  Star marks denote non-IRQ status bits.
29  */
30 #define KN02CA_IO_INR_FLOPPY	15	/* 82077 FDC */
31 #define KN02CA_IO_INR_NVRAM	14	/* (*) NVRAM clear jumper */
32 #define KN02CA_IO_INR_POWERON	13	/* (*) ACCESS.Bus/power-on reset */
33 #define KN02CA_IO_INR_TC0	12	/* TURBOchannel slot #0 */
34 #define KN02CA_IO_INR_TIMER	12	/* ARC periodic timer (?) */
35 #define KN02CA_IO_INR_ISDN	11	/* Am79C30A ISDN */
36 #define KN02CA_IO_INR_NRMOD	10	/* (*) NRMOD manufacturing jumper */
37 #define KN02CA_IO_INR_ASC	9	/* ASC (NCR53C94) SCSI */
38 #define KN02CA_IO_INR_LANCE	8	/* LANCE (Am7990) Ethernet */
39 #define KN02CA_IO_INR_HDFLOPPY	7	/* (*) HD (1.44MB) floppy status */
40 #define KN02CA_IO_INR_SCC0	6	/* SCC (Z85C30) serial #0 */
41 #define KN02CA_IO_INR_TC1	5	/* TURBOchannel slot #1 */
42 #define KN02CA_IO_INR_XDFLOPPY	4	/* (*) XD (2.88MB) floppy status */
43 #define KN02CA_IO_INR_VIDEO	3	/* framebuffer */
44 #define KN02CA_IO_INR_XVIDEO	2	/* ~framebuffer */
45 #define KN02CA_IO_INR_AB_XMIT	1	/* ACCESS.bus transmit */
46 #define KN02CA_IO_INR_AB_RECV	0	/* ACCESS.bus receive */
47 
48 
49 /*
50  * Memory Error Register bits.
51  */
52 #define KN02CA_MER_INTR		(1<<27)		/* ARC IRQ status & ack */
53 
54 /*
55  * Memory Size Register bits.
56  */
57 #define KN02CA_MSR_INTREN	(1<<26)		/* ARC periodic IRQ enable */
58 #define KN02CA_MSR_MS10EN	(1<<25)		/* 10/1ms IRQ period select */
59 #define KN02CA_MSR_PFORCE	(0xf<<21)	/* byte lane error force */
60 #define KN02CA_MSR_MABEN	(1<<20)		/* A side VFB address enable */
61 #define KN02CA_MSR_LASTBANK	(0x7<<17)	/* onboard RAM bank # */
62 
63 /*
64  * I/O ASIC System Support Register bits.
65  */
66 #define KN03CA_IO_SSR_RES_14	(1<<14)		/* unused */
67 #define KN03CA_IO_SSR_RES_13	(1<<13)		/* unused */
68 #define KN03CA_IO_SSR_ISDN_RST	(1<<12)		/* ~ISDN (Am79C30A) reset */
69 
70 #define KN03CA_IO_SSR_FLOPPY_RST (1<<7)		/* ~FDC (82077) reset */
71 #define KN03CA_IO_SSR_VIDEO_RST	(1<<6)		/* ~framebuffer reset */
72 #define KN03CA_IO_SSR_AB_RST	(1<<5)		/* ACCESS.bus reset */
73 #define KN03CA_IO_SSR_RES_4	(1<<4)		/* unused */
74 #define KN03CA_IO_SSR_RES_3	(1<<4)		/* unused */
75 #define KN03CA_IO_SSR_RES_2	(1<<2)		/* unused */
76 #define KN03CA_IO_SSR_RES_1	(1<<1)		/* unused */
77 #define KN03CA_IO_SSR_LED	(1<<0)		/* power LED */
78 
79 #endif /* __ASM_MIPS_DEC_KN02CA_H */
80