1384740dcSRalf Baechle /* 2384740dcSRalf Baechle * This file is subject to the terms and conditions of the GNU General Public 3384740dcSRalf Baechle * License. See the file "COPYING" in the main directory of this archive 4384740dcSRalf Baechle * for more details. 5384740dcSRalf Baechle * 6384740dcSRalf Baechle * Definitions for the interrupt related bits in the I/O ASIC 7384740dcSRalf Baechle * interrupt status register (and the interrupt mask register, of course) 8384740dcSRalf Baechle * 9384740dcSRalf Baechle * Created with Information from: 10384740dcSRalf Baechle * 11384740dcSRalf Baechle * "DEC 3000 300/400/500/600/700/800/900 AXP Models System Programmer's Manual" 12384740dcSRalf Baechle * 13384740dcSRalf Baechle * and the Mach Sources 14384740dcSRalf Baechle * 15384740dcSRalf Baechle * Copyright (C) 199x the Anonymous 16384740dcSRalf Baechle * Copyright (C) 2002 Maciej W. Rozycki 17384740dcSRalf Baechle */ 18384740dcSRalf Baechle 19384740dcSRalf Baechle #ifndef __ASM_DEC_IOASIC_INTS_H 20384740dcSRalf Baechle #define __ASM_DEC_IOASIC_INTS_H 21384740dcSRalf Baechle 22384740dcSRalf Baechle /* 23384740dcSRalf Baechle * The upper 16 bits are a part of the I/O ASIC's internal DMA engine 24384740dcSRalf Baechle * and thus are common to all I/O ASIC machines. The exception is 25384740dcSRalf Baechle * the Maxine, which makes use of the FLOPPY and ISDN bits (otherwise 26384740dcSRalf Baechle * unused) and has a different SCC wiring. 27384740dcSRalf Baechle */ 28384740dcSRalf Baechle /* all systems */ 29384740dcSRalf Baechle #define IO_INR_SCC0A_TXDMA 31 /* SCC0A transmit page end */ 30384740dcSRalf Baechle #define IO_INR_SCC0A_TXERR 30 /* SCC0A transmit memory read error */ 31384740dcSRalf Baechle #define IO_INR_SCC0A_RXDMA 29 /* SCC0A receive half page */ 32384740dcSRalf Baechle #define IO_INR_SCC0A_RXERR 28 /* SCC0A receive overrun */ 33384740dcSRalf Baechle #define IO_INR_ASC_DMA 19 /* ASC buffer pointer loaded */ 34384740dcSRalf Baechle #define IO_INR_ASC_ERR 18 /* ASC page overrun */ 35384740dcSRalf Baechle #define IO_INR_ASC_MERR 17 /* ASC memory read error */ 36384740dcSRalf Baechle #define IO_INR_LANCE_MERR 16 /* LANCE memory read error */ 37384740dcSRalf Baechle 38384740dcSRalf Baechle /* except Maxine */ 39384740dcSRalf Baechle #define IO_INR_SCC1A_TXDMA 27 /* SCC1A transmit page end */ 40384740dcSRalf Baechle #define IO_INR_SCC1A_TXERR 26 /* SCC1A transmit memory read error */ 41384740dcSRalf Baechle #define IO_INR_SCC1A_RXDMA 25 /* SCC1A receive half page */ 42384740dcSRalf Baechle #define IO_INR_SCC1A_RXERR 24 /* SCC1A receive overrun */ 43384740dcSRalf Baechle #define IO_INR_RES_23 23 /* unused */ 44384740dcSRalf Baechle #define IO_INR_RES_22 22 /* unused */ 45384740dcSRalf Baechle #define IO_INR_RES_21 21 /* unused */ 46384740dcSRalf Baechle #define IO_INR_RES_20 20 /* unused */ 47384740dcSRalf Baechle 48384740dcSRalf Baechle /* Maxine */ 49384740dcSRalf Baechle #define IO_INR_AB_TXDMA 27 /* ACCESS.bus transmit page end */ 50384740dcSRalf Baechle #define IO_INR_AB_TXERR 26 /* ACCESS.bus xmit memory read error */ 51384740dcSRalf Baechle #define IO_INR_AB_RXDMA 25 /* ACCESS.bus receive half page */ 52384740dcSRalf Baechle #define IO_INR_AB_RXERR 24 /* ACCESS.bus receive overrun */ 53384740dcSRalf Baechle #define IO_INR_FLOPPY_ERR 23 /* FDC error */ 54384740dcSRalf Baechle #define IO_INR_ISDN_TXDMA 22 /* ISDN xmit buffer pointer loaded */ 55384740dcSRalf Baechle #define IO_INR_ISDN_RXDMA 21 /* ISDN recv buffer pointer loaded */ 56384740dcSRalf Baechle #define IO_INR_ISDN_ERR 20 /* ISDN memory read/overrun error */ 57384740dcSRalf Baechle 58384740dcSRalf Baechle #define IO_INR_DMA 16 /* first DMA IRQ */ 59384740dcSRalf Baechle 60384740dcSRalf Baechle /* 61384740dcSRalf Baechle * The lower 16 bits are system-specific and thus defined in 62384740dcSRalf Baechle * system-specific headers. 63384740dcSRalf Baechle */ 64384740dcSRalf Baechle 65384740dcSRalf Baechle 66384740dcSRalf Baechle #define IO_IRQ_BASE 8 /* first IRQ assigned to I/O ASIC */ 67384740dcSRalf Baechle #define IO_IRQ_LINES 32 /* number of I/O ASIC interrupts */ 68384740dcSRalf Baechle 69384740dcSRalf Baechle #define IO_IRQ_NR(n) ((n) + IO_IRQ_BASE) 70384740dcSRalf Baechle #define IO_IRQ_MASK(n) (1 << (n)) 71384740dcSRalf Baechle #define IO_IRQ_ALL 0x0000ffff 72384740dcSRalf Baechle #define IO_IRQ_DMA 0xffff0000 73384740dcSRalf Baechle 74384740dcSRalf Baechle #endif /* __ASM_DEC_IOASIC_INTS_H */ 75