12874c5fdSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */ 2384740dcSRalf Baechle /* 3384740dcSRalf Baechle * include/asm-mips/dec/ioasic.h 4384740dcSRalf Baechle * 5384740dcSRalf Baechle * DEC I/O ASIC access operations. 6384740dcSRalf Baechle * 7384740dcSRalf Baechle * Copyright (C) 2000, 2002, 2003 Maciej W. Rozycki 8384740dcSRalf Baechle */ 9384740dcSRalf Baechle 10384740dcSRalf Baechle #ifndef __ASM_DEC_IOASIC_H 11384740dcSRalf Baechle #define __ASM_DEC_IOASIC_H 12384740dcSRalf Baechle 13384740dcSRalf Baechle #include <linux/spinlock.h> 14384740dcSRalf Baechle #include <linux/types.h> 15384740dcSRalf Baechle 16384740dcSRalf Baechle extern spinlock_t ioasic_ssr_lock; 17384740dcSRalf Baechle 18384740dcSRalf Baechle extern volatile u32 *ioasic_base; 19384740dcSRalf Baechle ioasic_write(unsigned int reg,u32 v)20384740dcSRalf Baechlestatic inline void ioasic_write(unsigned int reg, u32 v) 21384740dcSRalf Baechle { 22384740dcSRalf Baechle ioasic_base[reg / 4] = v; 23384740dcSRalf Baechle } 24384740dcSRalf Baechle ioasic_read(unsigned int reg)25384740dcSRalf Baechlestatic inline u32 ioasic_read(unsigned int reg) 26384740dcSRalf Baechle { 27384740dcSRalf Baechle return ioasic_base[reg / 4]; 28384740dcSRalf Baechle } 29384740dcSRalf Baechle 30384740dcSRalf Baechle extern void init_ioasic_irqs(int base); 31384740dcSRalf Baechle 32daed1285SMaciej W. Rozycki extern int dec_ioasic_clocksource_init(void); 33384740dcSRalf Baechle 34384740dcSRalf Baechle #endif /* __ASM_DEC_IOASIC_H */ 35