12874c5fdSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */ 2384740dcSRalf Baechle /* 3384740dcSRalf Baechle * include/asm-mips/dec/ecc.h 4384740dcSRalf Baechle * 5384740dcSRalf Baechle * ECC handling logic definitions common to DECstation/DECsystem 6384740dcSRalf Baechle * 5000/200 (KN02), 5000/240 (KN03), 5000/260 (KN05) and 7384740dcSRalf Baechle * DECsystem 5900 (KN03), 5900/260 (KN05) systems. 8384740dcSRalf Baechle * 9384740dcSRalf Baechle * Copyright (C) 2003 Maciej W. Rozycki 10384740dcSRalf Baechle */ 11384740dcSRalf Baechle #ifndef __ASM_MIPS_DEC_ECC_H 12384740dcSRalf Baechle #define __ASM_MIPS_DEC_ECC_H 13384740dcSRalf Baechle 14384740dcSRalf Baechle /* 15384740dcSRalf Baechle * Error Address Register bits. 16384740dcSRalf Baechle * The register is r/wc -- any write clears it. 17384740dcSRalf Baechle */ 18384740dcSRalf Baechle #define KN0X_EAR_VALID (1<<31) /* error data valid, bus IRQ */ 19384740dcSRalf Baechle #define KN0X_EAR_CPU (1<<30) /* CPU/DMA transaction */ 20384740dcSRalf Baechle #define KN0X_EAR_WRITE (1<<29) /* write/read transaction */ 21384740dcSRalf Baechle #define KN0X_EAR_ECCERR (1<<28) /* ECC/timeout or overrun */ 22384740dcSRalf Baechle #define KN0X_EAR_RES_27 (1<<27) /* unused */ 23384740dcSRalf Baechle #define KN0X_EAR_ADDRESS (0x7ffffff<<0) /* address involved */ 24384740dcSRalf Baechle 25384740dcSRalf Baechle /* 26384740dcSRalf Baechle * Error Syndrome Register bits. 27384740dcSRalf Baechle * The register is frozen when EAR.VALID is set, otherwise it records bits 28384740dcSRalf Baechle * from the last memory read. The register is r/wc -- any write clears it. 29384740dcSRalf Baechle */ 30384740dcSRalf Baechle #define KN0X_ESR_VLDHI (1<<31) /* error data valid hi word */ 31384740dcSRalf Baechle #define KN0X_ESR_CHKHI (0x7f<<24) /* check bits read from mem */ 32384740dcSRalf Baechle #define KN0X_ESR_SNGHI (1<<23) /* single/double bit error */ 33384740dcSRalf Baechle #define KN0X_ESR_SYNHI (0x7f<<16) /* syndrome from ECC logic */ 34384740dcSRalf Baechle #define KN0X_ESR_VLDLO (1<<15) /* error data valid lo word */ 35384740dcSRalf Baechle #define KN0X_ESR_CHKLO (0x7f<<8) /* check bits read from mem */ 36384740dcSRalf Baechle #define KN0X_ESR_SNGLO (1<<7) /* single/double bit error */ 37384740dcSRalf Baechle #define KN0X_ESR_SYNLO (0x7f<<0) /* syndrome from ECC logic */ 38384740dcSRalf Baechle 39384740dcSRalf Baechle 40384740dcSRalf Baechle #ifndef __ASSEMBLY__ 41384740dcSRalf Baechle 42384740dcSRalf Baechle #include <linux/interrupt.h> 43384740dcSRalf Baechle 44384740dcSRalf Baechle struct pt_regs; 45384740dcSRalf Baechle 46384740dcSRalf Baechle extern void dec_ecc_be_init(void); 47384740dcSRalf Baechle extern int dec_ecc_be_handler(struct pt_regs *regs, int is_fixup); 48384740dcSRalf Baechle extern irqreturn_t dec_ecc_be_interrupt(int irq, void *dev_id); 49384740dcSRalf Baechle #endif 50384740dcSRalf Baechle 51384740dcSRalf Baechle #endif /* __ASM_MIPS_DEC_ECC_H */ 52