1 /* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 1994 Waldorf GMBH 7 * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle 8 * Copyright (C) 1996 Paul M. Antoine 9 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 10 * Copyright (C) 2004 Maciej W. Rozycki 11 */ 12 #ifndef __ASM_CPU_INFO_H 13 #define __ASM_CPU_INFO_H 14 15 #include <linux/types.h> 16 17 #include <asm/cache.h> 18 19 /* 20 * Descriptor for a cache 21 */ 22 struct cache_desc { 23 unsigned int waysize; /* Bytes per way */ 24 unsigned short sets; /* Number of lines per set */ 25 unsigned char ways; /* Number of ways */ 26 unsigned char linesz; /* Size of line in bytes */ 27 unsigned char waybit; /* Bits to select in a cache set */ 28 unsigned char flags; /* Flags describing cache properties */ 29 }; 30 31 /* 32 * Flag definitions 33 */ 34 #define MIPS_CACHE_NOT_PRESENT 0x00000001 35 #define MIPS_CACHE_VTAG 0x00000002 /* Virtually tagged cache */ 36 #define MIPS_CACHE_ALIASES 0x00000004 /* Cache could have aliases */ 37 #define MIPS_CACHE_IC_F_DC 0x00000008 /* Ic can refill from D-cache */ 38 #define MIPS_IC_SNOOPS_REMOTE 0x00000010 /* Ic snoops remote stores */ 39 #define MIPS_CACHE_PINDEX 0x00000020 /* Physically indexed cache */ 40 41 struct cpuinfo_mips { 42 unsigned long asid_cache; 43 44 /* 45 * Capability and feature descriptor structure for MIPS CPU 46 */ 47 unsigned long ases; 48 unsigned long long options; 49 unsigned int udelay_val; 50 unsigned int processor_id; 51 unsigned int fpu_id; 52 unsigned int fpu_csr31; 53 unsigned int fpu_msk31; 54 unsigned int msa_id; 55 unsigned int cputype; 56 int isa_level; 57 int tlbsize; 58 int tlbsizevtlb; 59 int tlbsizeftlbsets; 60 int tlbsizeftlbways; 61 struct cache_desc icache; /* Primary I-cache */ 62 struct cache_desc dcache; /* Primary D or combined I/D cache */ 63 struct cache_desc scache; /* Secondary cache */ 64 struct cache_desc tcache; /* Tertiary/split secondary cache */ 65 int srsets; /* Shadow register sets */ 66 int package;/* physical package number */ 67 int core; /* physical core number */ 68 #ifdef CONFIG_64BIT 69 int vmbits; /* Virtual memory size in bits */ 70 #endif 71 #ifdef CONFIG_MIPS_MT_SMP 72 /* 73 * There is not necessarily a 1:1 mapping of VPE num to CPU number 74 * in particular on multi-core systems. 75 */ 76 int vpe_id; /* Virtual Processor number */ 77 #endif 78 void *data; /* Additional data */ 79 unsigned int watch_reg_count; /* Number that exist */ 80 unsigned int watch_reg_use_cnt; /* Usable by ptrace */ 81 #define NUM_WATCH_REGS 4 82 u16 watch_reg_masks[NUM_WATCH_REGS]; 83 unsigned int kscratch_mask; /* Usable KScratch mask. */ 84 /* 85 * Cache Coherency attribute for write-combine memory writes. 86 * (shifted by _CACHE_SHIFT) 87 */ 88 unsigned int writecombine; 89 /* 90 * Simple counter to prevent enabling HTW in nested 91 * htw_start/htw_stop calls 92 */ 93 unsigned int htw_seq; 94 } __attribute__((aligned(SMP_CACHE_BYTES))); 95 96 extern struct cpuinfo_mips cpu_data[]; 97 #define current_cpu_data cpu_data[smp_processor_id()] 98 #define raw_current_cpu_data cpu_data[raw_smp_processor_id()] 99 #define boot_cpu_data cpu_data[0] 100 101 extern void cpu_probe(void); 102 extern void cpu_report(void); 103 104 extern const char *__cpu_name[]; 105 #define cpu_name_string() __cpu_name[smp_processor_id()] 106 107 struct seq_file; 108 struct notifier_block; 109 110 extern int register_proc_cpuinfo_notifier(struct notifier_block *nb); 111 extern int proc_cpuinfo_notifier_call_chain(unsigned long val, void *v); 112 113 #define proc_cpuinfo_notifier(fn, pri) \ 114 ({ \ 115 static struct notifier_block fn##_nb = { \ 116 .notifier_call = fn, \ 117 .priority = pri \ 118 }; \ 119 \ 120 register_proc_cpuinfo_notifier(&fn##_nb); \ 121 }) 122 123 struct proc_cpuinfo_notifier_args { 124 struct seq_file *m; 125 unsigned long n; 126 }; 127 128 #ifdef CONFIG_MIPS_MT_SMP 129 # define cpu_vpe_id(cpuinfo) ((cpuinfo)->vpe_id) 130 #else 131 # define cpu_vpe_id(cpuinfo) ({ (void)cpuinfo; 0; }) 132 #endif 133 134 #endif /* __ASM_CPU_INFO_H */ 135