1 /* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 2008 Kevin D. Kissell 7 */ 8 9 /* 10 * Definitions used for common event timer implementation 11 * for MIPS 4K-type processors and their MIPS MT variants. 12 * Avoids unsightly extern declarations in C files. 13 */ 14 #ifndef __ASM_CEVT_R4K_H 15 #define __ASM_CEVT_R4K_H 16 17 #include <linux/clockchips.h> 18 #include <asm/time.h> 19 20 DECLARE_PER_CPU(struct clock_event_device, mips_clockevent_device); 21 22 void mips_event_handler(struct clock_event_device *dev); 23 int c0_compare_int_usable(void); 24 void mips_set_clock_mode(enum clock_event_mode, struct clock_event_device *); 25 irqreturn_t c0_compare_interrupt(int, void *); 26 27 extern struct irqaction c0_compare_irqaction; 28 extern int cp0_timer_irq_installed; 29 30 /* 31 * Possibly handle a performance counter interrupt. 32 * Return true if the timer interrupt should not be checked 33 */ 34 35 static inline int handle_perf_irq(int r2) 36 { 37 /* 38 * The performance counter overflow interrupt may be shared with the 39 * timer interrupt (cp0_perfcount_irq < 0). If it is and a 40 * performance counter has overflowed (perf_irq() == IRQ_HANDLED) 41 * and we can't reliably determine if a counter interrupt has also 42 * happened (!r2) then don't check for a timer interrupt. 43 */ 44 return (cp0_perfcount_irq < 0) && 45 perf_irq() == IRQ_HANDLED && 46 !r2; 47 } 48 49 #endif /* __ASM_CEVT_R4K_H */ 50