xref: /openbmc/linux/arch/mips/generic/init.c (revision 4f6cce39)
1 /*
2  * Copyright (C) 2016 Imagination Technologies
3  * Author: Paul Burton <paul.burton@imgtec.com>
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of the GNU General Public License as published by the
7  * Free Software Foundation;  either version 2 of the  License, or (at your
8  * option) any later version.
9  */
10 
11 #include <linux/clk.h>
12 #include <linux/clk-provider.h>
13 #include <linux/clocksource.h>
14 #include <linux/init.h>
15 #include <linux/irqchip.h>
16 #include <linux/of_fdt.h>
17 #include <linux/of_platform.h>
18 
19 #include <asm/fw/fw.h>
20 #include <asm/irq_cpu.h>
21 #include <asm/machine.h>
22 #include <asm/mips-cpc.h>
23 #include <asm/prom.h>
24 #include <asm/smp-ops.h>
25 #include <asm/time.h>
26 
27 static __initdata const void *fdt;
28 static __initdata const struct mips_machine *mach;
29 static __initdata const void *mach_match_data;
30 
31 void __init prom_init(void)
32 {
33 	plat_get_fdt();
34 	BUG_ON(!fdt);
35 }
36 
37 void __init *plat_get_fdt(void)
38 {
39 	const struct mips_machine *check_mach;
40 	const struct of_device_id *match;
41 
42 	if (fdt)
43 		/* Already set up */
44 		return (void *)fdt;
45 
46 	if ((fw_arg0 == -2) && !fdt_check_header((void *)fw_arg1)) {
47 		/*
48 		 * We booted using the UHI boot protocol, so we have been
49 		 * provided with the appropriate device tree for the board.
50 		 * Make use of it & search for any machine struct based upon
51 		 * the root compatible string.
52 		 */
53 		fdt = (void *)fw_arg1;
54 
55 		for_each_mips_machine(check_mach) {
56 			match = mips_machine_is_compatible(check_mach, fdt);
57 			if (match) {
58 				mach = check_mach;
59 				mach_match_data = match->data;
60 				break;
61 			}
62 		}
63 	} else if (IS_ENABLED(CONFIG_LEGACY_BOARDS)) {
64 		/*
65 		 * We weren't booted using the UHI boot protocol, but do
66 		 * support some number of boards with legacy boot protocols.
67 		 * Attempt to find the right one.
68 		 */
69 		for_each_mips_machine(check_mach) {
70 			if (!check_mach->detect)
71 				continue;
72 
73 			if (!check_mach->detect())
74 				continue;
75 
76 			mach = check_mach;
77 		}
78 
79 		/*
80 		 * If we don't recognise the machine then we can't continue, so
81 		 * die here.
82 		 */
83 		BUG_ON(!mach);
84 
85 		/* Retrieve the machine's FDT */
86 		fdt = mach->fdt;
87 	}
88 	return (void *)fdt;
89 }
90 
91 void __init plat_fdt_relocated(void *new_location)
92 {
93 	/*
94 	 * reset fdt as the cached value would point to the location
95 	 * before relocations happened and update the location argument
96 	 * if it was passed using UHI
97 	 */
98 	fdt = NULL;
99 
100 	if (fw_arg0 == -2)
101 		fw_arg1 = (unsigned long)new_location;
102 }
103 
104 void __init plat_mem_setup(void)
105 {
106 	if (mach && mach->fixup_fdt)
107 		fdt = mach->fixup_fdt(fdt, mach_match_data);
108 
109 	strlcpy(arcs_cmdline, boot_command_line, COMMAND_LINE_SIZE);
110 	__dt_setup_arch((void *)fdt);
111 }
112 
113 void __init device_tree_init(void)
114 {
115 	int err;
116 
117 	unflatten_and_copy_device_tree();
118 	mips_cpc_probe();
119 
120 	err = register_cps_smp_ops();
121 	if (err)
122 		err = register_up_smp_ops();
123 }
124 
125 void __init plat_time_init(void)
126 {
127 	struct device_node *np;
128 	struct clk *clk;
129 
130 	of_clk_init(NULL);
131 
132 	if (!cpu_has_counter) {
133 		mips_hpt_frequency = 0;
134 	} else if (mach && mach->measure_hpt_freq) {
135 		mips_hpt_frequency = mach->measure_hpt_freq();
136 	} else {
137 		np = of_get_cpu_node(0, NULL);
138 		if (!np) {
139 			pr_err("Failed to get CPU node\n");
140 			return;
141 		}
142 
143 		clk = of_clk_get(np, 0);
144 		if (IS_ERR(clk)) {
145 			pr_err("Failed to get CPU clock: %ld\n", PTR_ERR(clk));
146 			return;
147 		}
148 
149 		mips_hpt_frequency = clk_get_rate(clk);
150 		clk_put(clk);
151 
152 		switch (boot_cpu_type()) {
153 		case CPU_20KC:
154 		case CPU_25KF:
155 			/* The counter runs at the CPU clock rate */
156 			break;
157 		default:
158 			/* The counter runs at half the CPU clock rate */
159 			mips_hpt_frequency /= 2;
160 			break;
161 		}
162 	}
163 
164 	clocksource_probe();
165 }
166 
167 void __init arch_init_irq(void)
168 {
169 	struct device_node *intc_node;
170 
171 	intc_node = of_find_compatible_node(NULL, NULL,
172 					    "mti,cpu-interrupt-controller");
173 	if (!cpu_has_veic && !intc_node)
174 		mips_cpu_irq_init();
175 
176 	irqchip_init();
177 }
178 
179 static int __init publish_devices(void)
180 {
181 	if (!of_have_populated_dt())
182 		panic("Device-tree not present");
183 
184 	if (of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL))
185 		panic("Failed to populate DT");
186 
187 	return 0;
188 }
189 arch_initcall(publish_devices);
190 
191 void __init prom_free_prom_memory(void)
192 {
193 }
194